Xin Li's Homepage

Thursday, November 6, 2014

8:00AM: Opening Remarks

Session I: Design Verification and Test
Moderator: Yu Wang, Tsinghua University, P. R. China

8:05AM: Invited Talk

Towards Self-Learning AMS/RF Circuits and Systems: Adapting to Increasing Uncertainties in Real-Time Operating Conditions
Abhijit Chatterjee, Georgia Institute of Technology, USA

8:50AM: Poster Presentations

Moderator: Helmut Graeb, Technische Universität München, Germany

NICSLU: An Adaptive Sparse Solver for Circuit Simulation
Xiaoming Chen, Yu Wang, Huazhong Yang, Tsinghua University, P. R. China

A Performance-Guided Graph Sparsification Approach to Scalable and Robust SPICE-Accurate Integrated Circuit Simulations
Xueqian Zhao, Lengfei Han, Zhuo Feng, Michigan Technological University, USA

A Unifying and Robust Method for Efficient Envelope-Following Simulation of PWM/PFM DC-DC Converters
Ya Wang, Peng Li, Suming Lai, Texas A&M University, USA

A Zonotoped Reachability Verification for High-speed I/O Links
Ni Leibin, Sai Manoj P D, Yang Song, Hao Yu, Nanyang Technological University, Singapore

MPME-DP: Multi-Population Moment Estimation via Dirichlet Process for Efficient Validation of Analog/Mixed-Signal Circuits
Manzil Zaheer, Xin Li, Carnegie Mellon University, USA
Chenjie Gu, Intel, USA

Fast Statistical Analysis of Rare Circuit Failure Events via Subset Simulation in High-Dimensional Variation Space
Shupeng Sun, Xin Li, Carnegie Mellon University, USA

Analog Circuit Design Knowledge Mining: Discovering Topological Similarities and Uncovering Design Reasoning Strategies
Fanshu Jiao, Sergio Montano, Christian Ferent, Alex Doboli, State University of New York, USA
Simona Doboli, Hofstra University, USA

A Study on the Possibility of Flexible Analog Layout Migration
Po-Cheng Pan, Hung Ming Chen, National Chiao Tung University, Taiwan

Reduction and IR-drop Compensations Techniques for Reliable Neuromorphic Computing Systems
Beiye Liu, Hai Li, Yiran Chen, University of Pittsburgh, USA
Xin Li, Carnegie Mellon University, USA
Tingwen Huang, Texas A&M University, Qatar
Qing Wu, Mark Barnell, Air Force Research Laboratory, USA

9:30AM: Posters & Coffee

Session I (cont'd): Design Verification and Test
Moderator: Sheldon Tan, University of California, Riverside, USA

10:00AM: Invited Talk

ABCD and BEE: Tools for Analog/Mixed-Signal Verification via Boolean Modelling
Aadithya V Karthik, University of California, Berkeley, USA

10:45AM: Regular Talks

AMS Verification using COHO-REACH
Chao Yan, Synopsys, USA
Jije Wie, Google, USA
Mark Greenstreet, University of British Columbia, Canada

Design Methodologies and Verification of 3D Mixed-signal ICs
Wulong Liu, Yu Wang, Huazhong Yang, Tsinghua University, P. R. China
Guoqing Chen, AMD Research, P. R. China

Session II: Statistical and Circuit Design
Moderator: Mark Greenstreet, University of British Columbia, Canada

11:15AM: Invited Talk

Synthesis-friendly High-speed I/O Architectures
Bryan Casper, Intel, USA

12:00PM: Regular Talks

High-Dimensional Hierarchical Uncertainty Quantification for MEMS/IC Co-Design
Zheng Zhang, Luca Daniel, Massachusetts Institute of Technology, USA

12:15PM: Posters & Lunch

Session II (cont'd): Statistical and Circuit Design
Moderator: Ibrahim Elfadel, Masdar Institute, Abu Dhabi

1:15PM: Invited Talk

Analyzing the Effects of Process Variation and Mismatch on Circuit Design: Monte Carlo and Alternatives
Michael Pronath, MunEDA, Germany

Session III: Constraints and Layout Design
Moderator: Ngai Wong, University of Hong Kong, Hong Kong

2:00PM: Invited Talk

Data structures for Analog Placement
Martin D. F. Wong, University of Illinois at Urbana-Champaign, USA

2:45PM: Regular Talks

Analog Structure Tree for Floorplanning
Shigetoshi Nakatake, University of Kitakyushu, Japan

Design automation of layout modules for industrial analog mixed-signal applications
Federico Mantovani, Andreas Mueller, Infineon, Germany

3:15PM: Posters & Coffee

Session IV: Analog Benchmarks Reloaded
Moderator: Goeran Jerke, Bosch, Germany

3:45PM: Regular Talks

Benchmarks for Analog/Mixed-Signal Macromodeling Research
Shuqi Zhang, Ngai Wong, University of Hong Kong, Hong Kong
Chenjie Gu, Intel, USA

Evaluation of a Benchmark Suite for Formal Verification of Analog Circuits
Lars Hedrich, Felix Salfelder, Goethe University, Germany

4:15PM: Panel: Analog and Mixed-Signal IP: What Does it Take?

Chair: TBD

Panelist:
Srinivas Modekurty, Intel, USA
Bob Salem, Cadence, USA
Navraj Nandra, Synopsys, USA
Ahmed Ramadan, Mentor Graphics, USA