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research [2018/04/28 11:55] – [Select Papers] editresearch [2018/07/03 09:48] – [Research] edit
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 James C. Hoe is interested in many aspects of computer architecture and digital hardware design.  His current research focuses on computer architecture, reconfigurable computing and high-level hardware design and synthesis. ([[https://scholar.google.com/citations?user=ZnRhcFUAAAAJ&hl=en |Google Scholar Profile]], [[research#select_past_papers |select papers]] and [[students#graduated_students  | student theses]]) James C. Hoe is interested in many aspects of computer architecture and digital hardware design.  His current research focuses on computer architecture, reconfigurable computing and high-level hardware design and synthesis. ([[https://scholar.google.com/citations?user=ZnRhcFUAAAAJ&hl=en |Google Scholar Profile]], [[research#select_past_papers |select papers]] and [[students#graduated_students  | student theses]])
  
 +His current major research focus is on devising a new FPGA
 +architecture for power efficient, high-performance computing. His
 +research group is working on the CoRAM application development
 +framework that (1) presents a virtualized FPGA execution environment
 +and (2) offers a high-level programming abstraction to specify the
 +control sequencing of kernel invocations and data movements.  He is
 +further developing an FPGA runtime environment that incorporates
 +partial reconfiguration, virtualization, and protection features to
 +manage an FPGA as a dynamically sharable multitasking compute
 +resource.
  
  
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- 
-===== Downloads and Demos ===== 
-  * Frozen Snapshots (i.e., the student responsible graduated) 
-    * [[http://www.ece.cmu.edu/~coram/doku.php?id=connect-hls |CONNECT in C for Vivado HLS]] 
-    * [[http://www.ece.cmu.edu/calcm/connect |CONNECT Network-on-chip RTL Generator]] (Michael Papamichael now at MSR) 
-    * [[http://www.ece.cmu.edu/~coram/doku.php?id=corflow_beta |CoRAM-classic demo and download]] (Eric Chung now at MSR) 
-    * [[http://www.ece.cmu.edu/coram/doku.php?id=graphgencnn |GraphGen demo and download]] (Gabe Weisz now at ISI)   
-    * [[http://www.spiral.net/hardware/dftgen.html| FFT Hardware IP Generator]] (Peter Milder now at SUNY Stony Brook) 
-    * [[http://www.t-piper.net |T-piper tools, examples and tutorials]] ( Eriko Nurvitadhi now at Intel Labs) 
-    * [[http://www.ece.cmu.edu/~protoflex/doku.php#instructions_for_obtaining_the_source_code | ProtoFlex]] (Eric Chung now at MSR) 
    
  
 ===== Select Papers ===== ===== Select Papers =====
-    * Gabriel Weisz and James C. Hoe. **CoRAM++: Supporting Data-Structure-Specific Memory Interfaces for FPGA Computing**. Proc.  International Conference on Field-programmable Logic and Applications (FPL), September 2015. ([[http://www.ece.cmu.edu/~jhoe/distribution/2015/fpl2015.pdf |pdf]] | [[fpga_architecture_for_computing |project]])+    * **CoRAM++: Supporting Data-Structure-Specific Memory Interfaces for FPGA Computing**. Gabriel Weisz and James C. Hoe. Proc.  International Conference on Field-programmable Logic and Applications (FPL), September 2015. ([[http://www.ece.cmu.edu/~jhoe/distribution/2015/fpl2015.pdf |pdf]] | [[fpga_architecture_for_computing |project]])
     * **Computer Generation of Hardware for Digital Signal Processing Transforms**. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel.  ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 17 Issue 2, April 2012.  ([[http://portal.acm.org/citation.cfm?id=2159547 |acm]] | [[digital_signal_processing_hardware |project]])     * **Computer Generation of Hardware for Digital Signal Processing Transforms**. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel.  ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 17 Issue 2, April 2012.  ([[http://portal.acm.org/citation.cfm?id=2159547 |acm]] | [[digital_signal_processing_hardware |project]])
     * **CONNECT: Re-Examining Conventional Wisdom for Designing NoCs in the Context of FPGAs**. Michael Papamichael and James C. Hoe. Proc. ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February 2012. ([[http://www.ece.cmu.edu/~jhoe/distribution/2012/fpga12mp.pdf |pdf]] | [[fpga_architecture_for_computing |project]])      * **CONNECT: Re-Examining Conventional Wisdom for Designing NoCs in the Context of FPGAs**. Michael Papamichael and James C. Hoe. Proc. ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February 2012. ([[http://www.ece.cmu.edu/~jhoe/distribution/2012/fpga12mp.pdf |pdf]] | [[fpga_architecture_for_computing |project]]) 
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   * [[Cluster Computing|High Performance Cluster Computing]] (1992~2000, a.k.a., Start-X and Start-Jr)   * [[Cluster Computing|High Performance Cluster Computing]] (1992~2000, a.k.a., Start-X and Start-Jr)
 +
 +
 +
 +===== Downloads and Demos =====
 +  * Frozen Snapshots (i.e., the student responsible graduated)
 +    * [[http://www.ece.cmu.edu/~coram/doku.php?id=connect-hls |CONNECT in C for Vivado HLS]]
 +    * [[http://www.ece.cmu.edu/calcm/connect |CONNECT Network-on-chip RTL Generator]] (Michael Papamichael now at MSR)
 +    * [[http://www.ece.cmu.edu/~coram/doku.php?id=corflow_beta |CoRAM-classic demo and download]] (Eric Chung now at MSR)
 +    * [[http://www.ece.cmu.edu/coram/doku.php?id=graphgencnn |GraphGen demo and download]] (Gabe Weisz now at ISI)  
 +    * [[http://www.spiral.net/hardware/dftgen.html| FFT Hardware IP Generator]] (Peter Milder now at SUNY Stony Brook)
 +    * [[http://www.t-piper.net |T-piper tools, examples and tutorials]] ( Eriko Nurvitadhi now at Intel Labs)
 +    * [[http://www.ece.cmu.edu/~protoflex/doku.php#instructions_for_obtaining_the_source_code | ProtoFlex]] (Eric Chung now at MSR)