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     * **Computer Generation of Hardware for Digital Signal Processing Transforms**. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel.  ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 17 Issue 2, April 2012.  ([[http://portal.acm.org/citation.cfm?id=2159547 |acm]] | [[digital_signal_processing_hardware |project]])     * **Computer Generation of Hardware for Digital Signal Processing Transforms**. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel.  ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 17 Issue 2, April 2012.  ([[http://portal.acm.org/citation.cfm?id=2159547 |acm]] | [[digital_signal_processing_hardware |project]])
     * **CONNECT: Re-Examining Conventional Wisdom for Designing NoCs in the Context of FPGAs**. Michael Papamichael and James C. Hoe. Proc. ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February 2012. ([[http://www.ece.cmu.edu/~jhoe/distribution/2012/fpga12mp.pdf |pdf]] | [[fpga_architecture_for_computing |project]])      * **CONNECT: Re-Examining Conventional Wisdom for Designing NoCs in the Context of FPGAs**. Michael Papamichael and James C. Hoe. Proc. ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February 2012. ([[http://www.ece.cmu.edu/~jhoe/distribution/2012/fpga12mp.pdf |pdf]] | [[fpga_architecture_for_computing |project]]) 
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     * **Automatic Pipelining from Transactional Datapath Specifications**. E. Nurvitadhi, J. C. Hoe, T. Kam, S. L. Lu.  IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, Volume 30, Number 3,March 2011. ([[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=5715612 |ieee]] | [[pipeline_synthesis_from_transaction-based_specifications |project]])      * **Automatic Pipelining from Transactional Datapath Specifications**. E. Nurvitadhi, J. C. Hoe, T. Kam, S. L. Lu.  IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, Volume 30, Number 3,March 2011. ([[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=5715612 |ieee]] | [[pipeline_synthesis_from_transaction-based_specifications |project]]) 
     * **CoRAM: An In-Fabric Memory Architecture for FPGA-based Computing**. Eric S. Chung, James C. Hoe, and Kenneth Mai.  Proc. ACM International Symposium on Field-Programmable Gate Arrays (FPGA), pp 97~106, February 2011. ([[http://www.ece.cmu.edu/~jhoe/distribution/2011/fpga11.pdf |pdf]] | [[fpga_architecture_for_computing |project]])     * **CoRAM: An In-Fabric Memory Architecture for FPGA-based Computing**. Eric S. Chung, James C. Hoe, and Kenneth Mai.  Proc. ACM International Symposium on Field-Programmable Gate Arrays (FPGA), pp 97~106, February 2011. ([[http://www.ece.cmu.edu/~jhoe/distribution/2011/fpga11.pdf |pdf]] | [[fpga_architecture_for_computing |project]])