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+ | ====== Research ====== | ||
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+ | James C. Hoe is interested in many aspects of computer architecture and digital hardware design. | ||
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+ | ===== Active Projects ===== | ||
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+ | * [[FPGA Architecture for Computing |CoRAM FPGA Computing Abstraction]] | ||
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+ | * [[Digital Signal Processing Hardware | Digital Signal Processing Hardware]] | ||
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+ | * [[http:// | ||
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+ | ===== Downloads and Demos ===== | ||
+ | * Frozen Snapshots (i.e., the student responsible graduated) | ||
+ | * [[http:// | ||
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+ | ===== Select Papers ===== | ||
+ | * Gabriel Weisz and James C. Hoe. **CoRAM++: Supporting Data-Structure-Specific Memory Interfaces for FPGA Computing**. Proc. International Conference on Field-programmable Logic and Applications (FPL), September 2015. ([[http:// | ||
+ | * **Computer Generation of Hardware for Digital Signal Processing Transforms**. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel. | ||
+ | * **CONNECT: Re-Examining Conventional Wisdom for Designing NoCs in the Context of FPGAs**. Michael Papamichael and James C. Hoe. Proc. ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February 2012. ([[http:// | ||
+ | * **Automatic Pipelining from Transactional Datapath Specifications**. E. Nurvitadhi, J. C. Hoe, T. Kam, S. L. Lu. IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, Volume 30, Number 3,March 2011. ([[http:// | ||
+ | * **CoRAM: An In-Fabric Memory Architecture for FPGA-based Computing**. Eric S. Chung, James C. Hoe, and Kenneth Mai. Proc. ACM International Symposium on Field-Programmable Gate Arrays (FPGA), pp 97~106, February 2011. ([[http:// | ||
+ | * **ProtoFlex: | ||
+ | * **Permuting Streaming Data Using RAMs**. M. Pueschel, P. A. Milder and J. C. Hoe. Journal of the ACM (JACM), Volume 56, Issue 2, April 2009. ([[http:// | ||
+ | * **Reunion: Complexity-Effective Multicore Redundancy**. J. C. Smolens, B. T. Gold, B. Falsafi, and J. C. Hoe. International Symposium on Microarchitecture (MICRO), December | ||
+ | * **Statistical Sampling of Microarchitecture Simulation**. Roland E. Wunderlich, Thomas F. Wenisch, Babak Falsafi, and James C. Hoe. ACM Transactions on Modeling and Computer Simulation, Volume 16, Number 3, June 2006. ([[http:// | ||
+ | * **Fingerprinting: | ||
+ | * **Operation-Centric Hardware Description and Synthesis**. James C. Hoe and Arvind. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Volume 23, Issue 9, September 2004. ([[http:// | ||
+ | * **A Personal Supercomputer for Climate Research**. James C. Hoe, Chris Hill and Alistair Adcroft. | ||
+ | * **Network Interface for Message Passing Parallel Computation on a Workstation Cluster**. James C. Hoe. Hot Interconnects II, August 1994. ([[http:// | ||
+ | * **New Single Length Multiplication Semantic[sic] for The[sic] Next Generation 64-bit Processors**. | ||
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+ | ===== Past Projects ===== | ||
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+ | * [[GraphGen |GraphGen: Graph Computation Accelerator Compiler]] (2013~2016) | ||
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+ | * [[Pipeline Synthesis from Transaction-based Specifications]] (2009~2012, a.k.a. T-Piper) | ||
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+ | * [[FPGA Prototyping and Emulation of Computer Systems]] (2005~2011, a.k.a. ProtoFlex) | ||
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+ | * [[Reliable Processors and Systems]] (2001~2008, a.k.a. TRUSS) | ||
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+ | * [[SMARTS Simulation Sampling]] (2002~2006) | ||
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+ | * [[Operation Centric Hardware Abstraction |Operation Centric Hardware Description and Synthesis]] (1997~2004) | ||
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+ | * [[Cluster Computing|High Performance Cluster Computing]] (1992~2000, a.k.a., Start-X and Start-Jr) |