no way to compare when less than two revisions
Differences
This shows you the differences between two versions of the page.
Previous revision | |||
— | memocode_2009_design_contest_faq [2021/11/22 03:36] (current) – edit | ||
---|---|---|---|
Line 1: | Line 1: | ||
+ | ====== MEMOCODE 2009 Design Contest FAQ ====== | ||
+ | |||
+ | =====Isn' | ||
+ | |||
+ | The required computation is completely contrived. | ||
+ | |||
+ | =====Can I do it all in software on the latest greatest CPU?===== | ||
+ | |||
+ | You can use any platform. | ||
+ | |||
+ | =====Your " | ||
+ | You can do anything you want as long as you produce the same results as the reference implementation, | ||
+ | |||
+ | =====Can I enter using a simulated design? | ||
+ | For this contest, you must report measured wall-clock time so we cannot accept performance estimates based on simulation. | ||
+ | |||
+ | =====Will the starter EDK project work with EDK 10.x?===== | ||
+ | No. The starter project is built for EDK 9.2. If you | ||
+ | are using an earlier EDK, you should open the starter | ||
+ | project (mmm) from the contest in 2007 then follow the instructions | ||
+ | below to refresh the software. | ||
+ | |||
+ | If you don't want to use the DSOCM fifo | ||
+ | interface (not necessary, you can using Xilinx IPs or do your own), you can very easily | ||
+ | create a new project (in any EDK version) from | ||
+ | scratch for a PPC405 or microblaze system using | ||
+ | EDK's Base System Builder Wizard. | ||
+ | have verified your new system is working with a simple program, | ||
+ | you will be ready to add the reference implementation' | ||
+ | .c and .h files (in the RefSW directory) to your new | ||
+ | project. (Microblaze systems would require new timing functions | ||
+ | to be written in timer.h.) | ||
+ | |||
+ | If someone does this and wants to share it, please | ||
+ | let me know. | ||
+ | |||
+ | =====What do you mean " | ||
+ | |||
+ | The spec requires that the input array CART starts and the output array POL finishes in external off-chip memory. | ||
+ | |||
+ | This requirement is somewhat vague to allow for a variety of platforms to be used. Generally speaking, the input array at the start of timing should not be on the same chip as where computation is performed (e.g., not in cache for CPU, not in BRAM for Xilinx FPGA); the output array also should not be on the same chip when timing stops. | ||
+ | |||
+ | Before timing starts, you can use the CPU or FPGA to help initialize memory content (copying bits without pre-processing or analysis). | ||
+ | |||
+ | When in doubt, email the organizer for clarification. | ||
+ | |||
+ | ===== get() and set() functions ===== | ||
+ | |||
+ | The get() and set() functions allow for custom data layout. | ||
+ | |||
+ | You cannot " | ||
+ | |||
+ | The get() and set() functions are only allowed to make use of the problem paramter N. You may not take into consideration of R or theta. | ||
+ | |||
+ | ===== Test cases ===== | ||
+ | |||
+ | On 3/20, we will reveal a set of testcases which will be used for validation and timing measurements. | ||
+ | |||
+ | ===== How do I submit? | ||
+ | |||
+ | Please review the [[https:// | ||