Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revisionPrevious revision
Next revision		Previous revision
Next revisionBoth sides next revision
home [2019/10/22 14:34] – edithome [2020/01/05 22:01] – jhoe
Line 7: Line 7:
  
  
-{{:calcm_fence.jpg?450}} Find out about [[http://research.ece.cmu.edu/~calcm/doku.php?id=seminars:seminars | CALCM]] and  [[http://en.wikipedia.org/wiki/Carnegie_Mellon_University_traditions#The_fence |the Fence]]+{{:calcm_fence.jpg?450}} Find out about [[https://research.ece.cmu.edu/~calcm | CALCM]] and  [[http://en.wikipedia.org/wiki/Carnegie_Mellon_University_traditions#The_fence |the Fence]]
  
 == Current Courses == == Current Courses ==
Line 15: Line 15:
   * Fall: [[18-643 Reconfigurable Logic |ECE 18-643: Reconfigurable Logic - Technology, Architecture and Applications]]   * Fall: [[18-643 Reconfigurable Logic |ECE 18-643: Reconfigurable Logic - Technology, Architecture and Applications]]
  
-== Drop-in Office Hours ==+== Office Hours == 
 + 
 +For Spring 2020, I am holding office hours open to all matters and all students on Mondays and Tuesdays 11:00~12:00. Please send a heads-up [[how_to_contact_me | email]].  Please email for an appointment if you cannot make it to the regular hours.  18447 students can usually catch me at the end of lectures.
  
-For Fall 2019, I am holding drop-in office hours open to all matters and all students on Tuesdays 10~11 and Thursdays 1:30~2:30. No appointment is necessary (heads up email welcome).  Please [[how_to_contact_me | contact me]] for separate appointment if you cannot make it to the regular hours. 
  
  
Line 23: Line 24:
  
   * [[https://users.ece.cmu.edu/~jhoe/distribution/2017/18643-L07-essential.pdf | Very short lesson on RTL Verilog]]   * [[https://users.ece.cmu.edu/~jhoe/distribution/2017/18643-L07-essential.pdf | Very short lesson on RTL Verilog]]
-  * [[http://research.ece.cmu.edu/calcm/connect_hls | Can you use Vivado-HLS where you should be using Verilog?]]+  * [[https://research.ece.cmu.edu/~coram/doku.php?id=connect-hls | Can you use Vivado-HLS where you should be using Verilog?]]
   * [[FPGA Architecture for Computing]]    * [[FPGA Architecture for Computing]] 
-  * [[http://research.ece.cmu.edu/~calcm/doku.php?id=seminars:seminars | Computer Architecture Seminars (CALCM)]]+  * [[https://research.ece.cmu.edu/~calcm/doku.php?id=seminars:seminars | Computer Architecture Seminars (CALCM)]]