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home [2019/07/05 15:35] – edit | home [2020/01/05 22:01] – jhoe |
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{{:calcm_fence.jpg?450}} Find out about [[http://research.ece.cmu.edu/~calcm/doku.php?id=seminars:seminars | CALCM]] and [[http://en.wikipedia.org/wiki/Carnegie_Mellon_University_traditions#The_fence |the Fence]] | {{:calcm_fence.jpg?450}} Find out about [[https://research.ece.cmu.edu/~calcm | CALCM]] and [[http://en.wikipedia.org/wiki/Carnegie_Mellon_University_traditions#The_fence |the Fence]] |
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== Current Courses == | == Current Courses == |
* Fall: [[18-643 Reconfigurable Logic |ECE 18-643: Reconfigurable Logic - Technology, Architecture and Applications]] | * Fall: [[18-643 Reconfigurable Logic |ECE 18-643: Reconfigurable Logic - Technology, Architecture and Applications]] |
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| == Office Hours == |
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| For Spring 2020, I am holding office hours open to all matters and all students on Mondays and Tuesdays 11:00~12:00. Please send a heads-up [[how_to_contact_me | email]]. Please email for an appointment if you cannot make it to the regular hours. 18447 students can usually catch me at the end of lectures. |
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* [[https://users.ece.cmu.edu/~jhoe/distribution/2017/18643-L07-essential.pdf | Very short lesson on RTL Verilog]] | * [[https://users.ece.cmu.edu/~jhoe/distribution/2017/18643-L07-essential.pdf | Very short lesson on RTL Verilog]] |
* [[http://research.ece.cmu.edu/calcm/connect_hls | Can you use Vivado-HLS where you should be using Verilog?]] | * [[https://research.ece.cmu.edu/~coram/doku.php?id=connect-hls | Can you use Vivado-HLS where you should be using Verilog?]] |
* [[FPGA Architecture for Computing]] | * [[FPGA Architecture for Computing]] |
* [[http://research.ece.cmu.edu/~calcm/doku.php?id=seminars:seminars | Computer Architecture Seminars (CALCM)]] | * [[https://research.ece.cmu.edu/~calcm/doku.php?id=seminars:seminars | Computer Architecture Seminars (CALCM)]] |
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