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home [2017/09/30 16:32] – [James C. Hoe's Home Page] jhoe | home [2017/09/30 16:32] – [James C. Hoe's Home Page] jhoe |
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* [[https://users.ece.cmu.edu/~jhoe/distribution/2017/18643-L07-essential.pdf | Very short lesson on RTL Verilog]] | * [[https://users.ece.cmu.edu/~jhoe/distribution/2017/18643-L07-essential.pdf | Very short lesson on RTL Verilog]] |
* * [[http://www.ece.cmu.edu/calcm/connect_hls | Can you use Vivado-HLS where you should be using Verilog?]] | * [[http://www.ece.cmu.edu/calcm/connect_hls | Can you use Vivado-HLS where you should be using Verilog?]] |
* [[http://dl.acm.org/citation.cfm?id=2996866 |"Perspective" on FPGA Acceleration]] | * [[http://dl.acm.org/citation.cfm?id=2996866 |"Perspective" on FPGA Acceleration]] |
* [[FPGA Architecture for Computing |CoRAM FPGA Computing Abstraction]] | * [[FPGA Architecture for Computing |CoRAM FPGA Computing Abstraction]] |
* [[http://www.ece.cmu.edu/~calcm/doku.php?id=seminars:seminars | Computer Architecture Lab Seminars (CALCM)]] | * [[http://www.ece.cmu.edu/~calcm/doku.php?id=seminars:seminars | Computer Architecture Seminars (CALCM)]] |
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