Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Next revision		Previous revision
Next revisionBoth sides next revision
bhsc14 [2017/09/29 14:11] – external edit 127.0.0.1bhsc14 [2019/07/05 15:39] – edit
Line 1: Line 1:
 ~~NOTOC~~ ~~NOTOC~~
  
-======Does Hardware Design Have to be Hard?======+ 
 +======(Inactive Page) Does Hardware Design Have to be Hard?====== 
 +**Most of the materials has since made it into [[18-643_reconfigurable_logic |18-643]]**
  
 =====BeiHang University Short Course 9/22~9/26/2014===== =====BeiHang University Short Course 9/22~9/26/2014=====
Line 10: Line 12:
  
 There will be approximately 2 hours of slide-based presentation and 1 hour of open discussion per day for this 5-day short course. There will be approximately 2 hours of slide-based presentation and 1 hour of open discussion per day for this 5-day short course.
 +
 +
  
 ===== Lecture Topics ===== ===== Lecture Topics =====
 +
 +(Note: Most of the materials has since made it into [[18-643_reconfigurable_logic |18-643]])
  
   * Introduction ([[http://www.ece.cmu.edu/~jhoe/distribution/bhsc14/BH0-Intro.pdf |slides]])   * Introduction ([[http://www.ece.cmu.edu/~jhoe/distribution/bhsc14/BH0-Intro.pdf |slides]])
Line 18: Line 24:
   * C-to-Hardware Design and Synthesis ([[http://www.ece.cmu.edu/~jhoe/distribution/bhsc14/BH3-CtoH.pdf |slides]] — [[http://ieeexplore.ieee.org/xpl/tocresult.jsp?reload=true&isnumber=5209950|D&T Special Issue]])   * C-to-Hardware Design and Synthesis ([[http://www.ece.cmu.edu/~jhoe/distribution/bhsc14/BH3-CtoH.pdf |slides]] — [[http://ieeexplore.ieee.org/xpl/tocresult.jsp?reload=true&isnumber=5209950|D&T Special Issue]])
   * Domain-Specialized High-level Synthesis (Spiral) ([[http://www.ece.cmu.edu/~jhoe/distribution/bhsc14/BH4-Spiral.pdf |slides]] — [[digital_signal_processing_hardware|project website]] — [[http://www.spiral.net/hardware/dftgen.html|DFTgen]])   * Domain-Specialized High-level Synthesis (Spiral) ([[http://www.ece.cmu.edu/~jhoe/distribution/bhsc14/BH4-Spiral.pdf |slides]] — [[digital_signal_processing_hardware|project website]] — [[http://www.spiral.net/hardware/dftgen.html|DFTgen]])
-  * “Smart” IP-Based Design (Pandora) ([[http://www.ece.cmu.edu/~jhoe/distribution/bhsc14/BH5-SmartIP.pdf |slides]] — [[http://www.ece.cmu.edu/calcm/connect/|CONNECT NoC Generator]])+  * “Smart” IP-Based Design (Pandora) ([[http://www.ece.cmu.edu/~jhoe/distribution/bhsc14/BH5-SmartIP.pdf |slides]] — [[http://research.ece.cmu.edu/calcm/connect/|CONNECT NoC Generator]])
   * Infrastructure and Virtualization (CoRAM) ([[http://www.ece.cmu.edu/~jhoe/distribution/bhsc14/BH6-CoRAM.pdf |slides]] — [[fpga_architecture_for_computing|project website]] — [[http://www.ece.cmu.edu/~coram/doku.php?id=corflow_beta|try it out]])   * Infrastructure and Virtualization (CoRAM) ([[http://www.ece.cmu.edu/~jhoe/distribution/bhsc14/BH6-CoRAM.pdf |slides]] — [[fpga_architecture_for_computing|project website]] — [[http://www.ece.cmu.edu/~coram/doku.php?id=corflow_beta|try it out]])
   * Performance, Power and Energy of Hardware Acceleration ([[http://www.ece.cmu.edu/~jhoe/distribution/bhsc14/BH7-Accel.pdf |slides]] — [[http://www.ece.cmu.edu/~jhoe/distribution/2010/micro10.pdf|background reading]])   * Performance, Power and Energy of Hardware Acceleration ([[http://www.ece.cmu.edu/~jhoe/distribution/bhsc14/BH7-Accel.pdf |slides]] — [[http://www.ece.cmu.edu/~jhoe/distribution/2010/micro10.pdf|background reading]])