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+ | ====== A Short Intro to ModelSim Verilog Simulator (Last edited in 2015) ====== | ||
+ | This is a beginner' | ||
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+ | ===== Environment Setup ===== | ||
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+ | This assumes you are running bash on an ECE Linux machine. (You can determine which shell you are using by typing '' | ||
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+ | Type this command | ||
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+ | '' | ||
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+ | (PATH tells your shell where to find the executables for ModelSim.) | ||
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+ | Next type | ||
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+ | '' | ||
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+ | LM_LICENSE_FILE tells ModelSim where to find its license file. | ||
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+ | (The above should work regardless of how your environment is initially set up. If you are familiar with the Unix shell environment, | ||
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+ | If you messed up on the first command, '' | ||
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+ | ===== Creating a library directory ===== | ||
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+ | ModelSim requires a " | ||
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+ | '' | ||
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+ | This creates a directory called work needed by Modelsim. If you delete this directory, you will need to create it again before running any compilations. | ||
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+ | ===== Compiling Verilog files ===== | ||
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+ | Next from the working directory, type | ||
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+ | '' | ||
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+ | This might look like | ||
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+ | '' | ||
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+ | Or, if all of the .v files are pertinent, just type | ||
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+ | '' | ||
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+ | This compiles your .v files for simulation. If there were no errors, the compilation should list the modules compiled and point out the top level modules (ones not included by any other modules). If the compilation failed with ERR messages, you will need to revise your .v files to address the complaints and recompile. | ||
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+ | ===== Running ModelSim ===== | ||
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+ | To run ModelSim, from the working directory, type: | ||
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+ | '' | ||
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+ | For example, | ||
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+ | '' | ||
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+ | if '' | ||
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+ | '' | ||
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+ | The simulation will run until it encounters a '' | ||
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+ | '' | ||
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+ | at the Unix command prompt to run vsim in text mode (without X). | ||
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+ | ===== Debugging in ModelSim ===== | ||
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+ | Most likely, you'll run into bugs and need to muck around with the waveform viewer and debugger. ModelSim has a great GUI with which to debug the design. Most of this you will have to discover for yourself. Here's a quick tutorial. | ||
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+ | * To bring up an object window: **View→Debug Windows→Object** | ||
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+ | * To bring up a waveform window: **View→Debug Windows→Waves**.\\ You can add signals to the waveform window by dragging and dropping things from the object window into the waveform window (left panel). | ||
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+ | * To run the simulation (from the **Simulate→Run** pull-down menu): | ||
+ | * **Run - All**: Run until the next breakpoint or until a '' | ||
+ | * **Run - Continue**: Continue running after a breakpoint. | ||
+ | * **Run - 100ns**: Run for 100ns of simulation time. | ||
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+ | * If you find a bug, you can edit, recompile and restart the simulation, without quitting the ModelSim executable. Just type the same compilation command into the bash shell and then type restart the simulation inside ModelSim. You do not need to restart ModelSim after recompiling. | ||
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+ | * Virtually all click-able things can be accessed with keyboard commands. For power users with too much time on their hands, ModelSim can be scripted using TCL. | ||
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+ | This tutorial should have set you up for the most minimum of functionalities to run a basic Verilog simulation project. Reading documentations will help you access the more powerful debugging and simulation features. You can google online for more thorough, more advanced tutorials. You can also try googling a specific question phrase; it is amazing how much expert help is just out there. | ||
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