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| 18-643_course_schedule_fall_2017 [2017/11/15 16:24] – [Schedule and Lecture Notes] edit | 18-643_course_schedule_fall_2017 [2024/01/03 14:32] – edit |
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| ====== 18-643 Course Schedule, Fall 2017====== | ====== 18-643 Course Schedule, Fall 2017 (**Not Most Recent**) ====== |
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| * Lecture notes are posted within 24 hours after the lecture; you may find it useful to preview lecture notes from [[18-643 Course Schedule, Fall 2016 |Fall 2016]] before class. | * Lecture notes are posted within 24 hours after the lecture; you may find it useful to preview lecture notes from [[18-643 Course Schedule, Fall 2016 |Fall 2016]] before class. |
| ==== Schedule and Lecture Notes ==== | ==== Schedule and Lecture Notes ==== |
| ^ Week ^ Date ^ L# ^ Topic ^ Readings ^ Lab ^ | ^ Week ^ Date ^ L# ^ Topic ^ Readings ^ Lab ^ |
| | 1 | 8/29 | [[https://www.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L01.pdf |L1]] | Introduction | 1st-Half Kick Off: [Trimberger15]\\ check out [[https://www.microsoft.com/en-us/research/blog/microsoft-unveils-project-brainwave/, |Microsoft Brainwave]] | Lab 0: Warm-Up | | | 1 | 8/29 | [[https://users.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L01.pdf |L1]] | Introduction | 1st-Half Kick Off: [Trimberger15]\\ check out [[https://www.microsoft.com/en-us/research/blog/microsoft-unveils-project-brainwave/, |Microsoft Brainwave]] | Lab 0: Warm-Up | |
| | | 8/31 | [[https://www.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L02.pdf |L2]] | FPGA Basics | RC Ch 1\\ (skim RC Ch 13,14) | | | | | 8/31 | [[https://users.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L02.pdf |L2]] | FPGA Basics | RC Ch 1\\ (skim RC Ch 13,14) | | |
| | 2 | 9/5 | [[https://www.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L03.pdf |L3]] | FPGA Less Basic | (skim [Ahmed16]) | | | | 2 | 9/5 | [[https://users.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L03.pdf |L3]] | FPGA Less Basic | (skim [Ahmed16]) | | |
| | | 9/7 | [[https://www.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L04.pdf |L4]] | Partial Reconfig and SoC | ZB 5.6 and Ch 2\\ (skim ZB Ch 3,10)] | | | | | 9/7 | [[https://users.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L04.pdf |L4]] | Partial Reconfig and SoC | ZB 5.6 and Ch 2\\ (skim ZB Ch 3,10)] | | |
| | 3 | 9/12 | [[https://www.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L05.pdf |L5]] | Design Metrics | read H&P chapter on performance if you haven't\\ read for later [Kung86][Shao14]| Lab 1: Vivado SoC | | | 3 | 9/12 | [[https://users.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L05.pdf |L5]] | Design Metrics | read H&P chapter on performance if you haven't\\ read for later [Kung86][Shao14]| Lab 1: Vivado SoC | |
| | | 9/14 | [[https://www.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L06.pdf |L6]] | Hard vs Soft Logic | (skim [Kuon06][Chung10][Papamichael12]) | | | | | 9/14 | [[https://users.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L06.pdf |L6]] | Hard vs Soft Logic | (skim [Kuon06][Chung10][Papamichael12]) | | |
| | 4 | 9/19 | [[https://www.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L07.pdf |L7]] | Structural RTL | HDL Compiler for Verilog Reference Manual\\ Vivado Design Suite User Guide: Synthesis (UG901)| | | | 4 | 9/19 | [[https://users.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L07.pdf |L7]] | Structural RTL | HDL Compiler for Verilog Reference Manual\\ Vivado Design Suite User Guide: Synthesis (UG901)| | |
| | | 9/21 | [[https://www.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L08.pdf |L8]] | Abstract Models | (skim RC Ch5,8,9,10) | | | | | 9/21 | [[https://users.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L08.pdf |L8]] | Abstract Models | (skim RC Ch5,8,9,10) | | |
| | 5 | 9/26 | [[https://www.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L09.pdf |L9]] | C-to-HW | [Edwards05] (skim IEEE Design & Test of Computers Issue 4, July-Aug. 2009\\ RC Ch7, ZB Ch 14) | Lab 2: Vivado HLS, read [Zhang15]| | | 5 | 9/26 | [[https://users.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L09.pdf |L9]] | C-to-HW | [Edwards05] (skim IEEE Design & Test of Computers Issue 4, July-Aug. 2009\\ RC Ch7, ZB Ch 14) | Lab 2: Vivado HLS, read [Zhang15]| |
| | | 9/28 | [[https://www.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L10.pdf |L10]] | Vivado HLS | ZB Ch 15\\ Vivado Design Suite User Guide: High-Level Synthesis (UG902) | | | | | 9/28 | [[https://users.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L10.pdf |L10]] | Vivado HLS | ZB Ch 15\\ Vivado Design Suite User Guide: High-Level Synthesis (UG902) | | |
| | 6 | 10/3 | [[https://www.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L11.pdf |L11]] | Altera OpenCL | RC Ch 10\\ [Aydonat17]\\ (skim Altera SDK for OpenCL: Programming Guide) | | | | 6 | 10/3 | [[https://users.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L11.pdf |L11]] | Altera OpenCL | RC Ch 10\\ [Aydonat17]\\ (skim Altera SDK for OpenCL: Programming Guide) | | |
| | | 10/5 | [[https://www.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L12.pdf |L12]] | Domain-Specific HLS | (skim [Milder12] [[http://www.spiral.net/hardware/dftgen.html |Spiral DFTgen]]) | | | | | 10/5 | [[https://users.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L12.pdf |L12]] | Domain-Specific HLS | (skim [Milder12] [[http://www.spiral.net/hardware/dftgen.html |Spiral DFTgen]]) | | |
| | 7 | 10/10 | [[https://www.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L13.pdf |L13]] | FPGA Memory Architecture | | Lab 3: HW Accelerate | | | 7 | 10/10 | [[https://users.ece.cmu.edu/~jhoe/course/ece643/F17handouts/L13.pdf |L13]] | FPGA Memory Architecture | | Lab 3: HW Accelerate | |
| | | 10/12 | L14 | CoRAM FPGA Computing Abstraction\\ Lecturer: Joe Melber | [Chung11] | | | | | 10/12 | L14 | CoRAM FPGA Computing Abstraction\\ Lecturer: Joe Melber | [Chung11] | | |
| | 8 | 10/17 | ^ Midterm 1 | 2nd-Half Kick Off: [Tessier15] (skim [DeHon15]) | | | | 8 | 10/17 | ^ Midterm 1 | 2nd-Half Kick Off: [Tessier15] (skim [DeHon15]) | | |
