18-548/15-548 Fall 1998

Lab 2: Memory System Parameters

Due Friday, September 25, 1998 at 3:00 PM


These problems demonstrate that you can tell a lot about a machine's memory hierarchy by running some fairly simple timing programs. Be sure to compile all your programs with the C compiler optimization turned on! It's also best to do your runs on a lightly loaded machine; however the results should still be reasonable with a machine that is moderately loaded.

A "hint" for each problem will be discussed in recitation one week before the lab is due. You are strongly encouraged to try this without the hint, and if you get stuck you can also e-mail the course staff to get the hint in advance. H&P Problem 5.2 is one way to approach this, but is more complicated than necessary for this lab because it does everything at once instead of using a separate program for each parameter being tested (advice: you can study it, but don't use that code).


Problem 1:
Experimentally determine the cache block size and virtual memory page size on some Unix platform. You may wish to use the starting point from Lab 1: cachsize.c, but significant changes will need to be made.

  1. Create a C program to probe the memory system and determine both cache block size and virtual memory page size via execution time experiments. Include your program listing, and include in a comment at the top of your program any sources you looked at for help (bona fide published sources or chalkboard talks with other students won't cost you points, I just want to know you did it. BUT the program you hand in must be one you actually write yourself). Note that I want a clean and obvious program for this specific purpose, not some slight adaptation of a general-purpose cache-probing program that you might find elsewhere. Results must be reported in bytes/sec achieved transfer rate from memory system reads, similar to what was done in Lab 1. But, you don't necessarily want to use the same access patterns that you did in Lab 1...
    Use a hi-liter or other colored pen/marker to indicate the "inner loop" where you are doing the actual memory accessing.
  2. Run the program on a Unix platform. Tabulate the results (bytes/sec for several runs) and also plot a graph. Label the graph with the hostname and general machine type information (e.g., "Power PC", or "SPARC"; more specific if you happen to know the details). Choose an appropriate graph format for the purposes of answering questions 3 & 4 below.
  3. What is the cache block size of the computer you measured? Assume that "block" in this context is equivalent to the number of bytes of data loaded into cache on a cache miss. Draw an arrow on the graph clearly indicating the "feature" that tells you the block size.
  4. What is the virtual memory page size of the computer you measured? Again draw an arrow to the graph feature.
  5. Repeat the experiment on a second workstation with a CPU from a different manufacturer and plot that curve, indicating block size and page size (you need not include tabulated data for the second machine). If you don't have access to a second workstation type, log in to: unix.andrew.cmu.edu with the I.D. of butler and obtain a list of idle Andrew workstations. Note that you might want to wait for this part until you have problem 2 ready to run on the second machine as well.

Problem 2:
Experimentally determine the number of TLB entries on some Unix platform. All the comments and ground rules apply from Problem 1 above.

  1. Create a C program that reports bytes/sec transfer rate from memory system reads. It may be helpful to know the block size from Problem 1 above; all other cache parameters should be largely irrelevant if you think about the problem the right way.
  2. Run the program on a Unix platform. Provide tabulated and graphed results.
  3. How many TLB entries are available to your program (your experiment may not find all the TLB entries if the system has held one or two out for a special purpose)? Draw an arrow on the plot clearly indicating the "feature" that tells you this result.
  4. Repeat the experiment on a second workstation; provide just the graph with an arrow identifying the number of TLB entries.

18-548/15-548 home page.