Appendix C: MICS Fabrication Process


G.K. Fedder, Simulation of Microelectromechanical Systems, Ph.D. Thesis , U.C.Berkeley, 1994.
The following listing is the process flow for the Modular Integration of CMOS and Polysilicon Microstructures, called ``MICS". This flow reflects the status of the MICS process when the integrated-testbed system was fabricated, in the fall of 1993. Up-to-date information about MICS is available from the Berkeley Sensor & Actuator Center. Notes are included with the process outline to document the results from the integrated-testbed run. We have included dates with the flow to give an idea of the time it takes to finish a microstructure process; this run took a little over two months to complete.
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                          MICS BACKEND PROCESS (3 SENSOR POLY)
                                  Version 2.0 
                                   (08-27-93)
            J. Bustillo, G. K. Fedder, C. T.-C. Nguyen, and R. T. Howe
            1 or 2 um substrate gap, 2um thickness, In Situ Doped poly-Si

    0.0-30.0  standard Baseline CMOS through and including Contact Etch
    -----------------------------------------------------------------------
    31.0  TiN/TiSi2 Formation  - Wed Sept 22 1993
    -----------------------------------------------------------------------
        31.1  a) 20 sec 25/1 HF dip just before titanium metallization
                   b) measure PSG oxide loss
    -----------------------------------------------------------------------
        31.2  Titanium Metallization:  target = 350A
              CPA:  pressure = 20 mTorr Ar, power = 2 kW, 
                    track speed = 60 cm/s
              Ti thickness on as200 = 200-285A (thinner than expected)
              4-point probe on Ti monitor 1 (over bare Si): 37 ohm/sq
              4-point probe on Ti monitor 2 (over oxide): 84 ohm/sq
    -----------------------------------------------------------------------
        31.3  RTA for TiN / TiSix Formation 
              Heatpulse1:  time = 30 sec, temp. = 600 C, flow = 2 slpm N2
                           Wafer ends up silver, instead of usual golden 
                           color after anneal.
              4-point probe on Ti monitor 1 (over bare Si): 14 ohm/sq
    -----------------------------------------------------------------------
        31.4  Self Aligned Ti Strip
              a) Soak wafers in 3:1 NH4OH:H2O2 for 12 min, agitated
              b) check for lack of continuity in field region
              c) add 5 min if field not clear
    -----------------------------------------------------------------------
        31.5  Check for field Ti shorts using I-V probe
    -----------------------------------------------------------------------
        31.6  RTA for TiSi2 and Rc reduction
              Heatpulse1:  time = 30 sec, temp. 850 C, flow = 2 slpm N2
              4-point probe on Ti monitor 1 (over bare Si): 5 ohm/sq
    -----------------------------------------------------------------------
        31.7  Titanium Nitride deposition:  target = 650A
              CPA: p = 20 mTorr (Ar/N2=50/50), Pdc = 2 kW, speed = 30 cm/s
              TiN thickness measured with as200 = 200A 
               (thinner than expected)
              inspect:  some source contacts on cmos30-3 are gold/brown,
                    whereas all other contacts are white/gold. 
                    No graininess.
              4-point probe on Ti monitor 1 (over bare Si): 5 ohm/sq
              4-point probe on TiN monitor 3 (over bare Si): 20 kohm/sq
    -----------------------------------------------------------------------
        31.8  TiN Anneal
              SVANNEAL: tylan14, 20min @ 600C in N2 (15 min ramp from 400C)
                        2 hr ramp down to 375C
              inspect: no graininess, contacts are maize/gold
              4-point probe on Ti monitor 1 (over bare Si): 5 ohm/sq
    -----------------------------------------------------------------------
    32.0  Tungsten Metallization:  target = 5000-6000 A total 
    -----------------------------------------------------------------------
       ** option 1: (available in the Microlab and used for cmos30-2)

                32.1  First tungsten deposition - Thu Sept 23 1993
                      CPA, 2.0kW, 20mT (Ar=100%), 16 cm/min

                32.2  First tungsten stress relief anneal
                      RTA: 30sec @ 900C in Ar

                32.3  Second tungsten deposition
                      CPA, 2.0kW, 20mT (Ar=100%), 16 cm/min

                32.2  Second tungsten stress relief anneal
                      RTA: 30sec @ 900C in Ar
           inspect: film quality is specular, no graininess in contacts.
           4-point probe on Ti monitor 1 (over bare Si): 0.4 ohm/sq
    -----------------------------------------------------------------------
       ** option 2: (preferred process due to reduced film stress)

          CVD:  hydrogen reduction process at Stanford CIM

                32.1  Tungsten deposition
                        a) nucleation layer:  SiH4 reduction (Tf=1000A)
                        b) bulk deposition:   H2 reduction (Tf=5000A)
    -----------------------------------------------------------------------
    33.0  Metal Photo Mask:  CMF (emulsion-cf)
                   a) Photo Module 1.0:  thick g-line PR
                b) align to POLY-CPG 
    -----------------------------------------------------------------------
    34.0  Tungsten / Titanium Nitride Etch 
    -----------------------------------------------------------------------
         34.1  Etch Module 1.0: Tungsten Etch
    -----------------------------------------------------------------------
         34.2  Etch inspect:  
                a) should see oxide color
                b) test for lack of continuity in the field
                c) check for stringers at gate poly vernier and TX gates
         nanospec:  field tox after W etch, in angstroms
                      T     R     B     L     C      mean      sigma
         cmos30-2:  12202 11855 11930 12066 11590 -> 11929 +/- 231
    -----------------------------------------------------------------------
         34.3  PR strip:  a) module 3.0 - no SP clean! 
                          b) PRS-2000, 10 min, at 50C (needed)
                          c) acetone soak (if needed) (didn't need)
    -----------------------------------------------------------------------
    35.0  Sintering and Test:
    ----------------------------------------------------------------------- 
         35.1  Acetone rinse for 30 min, DI rinse, blow dry 
               (didn't do this)
    ----------------------------------------------------------------------- 
         35.2  SINTV: tylan14, 400 C for 20 min. in forming gas.
               (used SINTV instead of SINT400, because of higher
                     forming gas flow.  This may help inhibit tungsten
                     oxidation while loading/unloading tube)
    ----------------------------------------------------------------------- 
         35.3  CMOS device testing of Vt's, and contacts (N+, P+, CPG)
    -----------------------------------------------------------------------
    36.0  Std. Tungsten clean:  Acetone rinse for 30 min. + DI rinse
                      in sink7.  Blow dry with N2 gun.
                Also, clean NITCTRL1 and NITCTRL2 in sink6.
                (didn't do this, instead used:
                 mti: acetone strip program ran twice to clean wafers
                 sink8: DI rinse to 12 Mohm)
    -----------------------------------------------------------------------
    37.0  CMOS Passivation - Tue Sep 28 1993
    -----------------------------------------------------------------------
         37.1  LTO Deposition: tylan20, VDOLTOC, target = 3500-5000 A
                 Flows (sccm):  SiH4 = 60, PH3 = 0, O2 = 90
               Temp = 400 C, pressure = 300 mT
               time = 25 min (review previous DR on wand)
               Include NITCTRL1 and NITCTRL2 and a tox ctrl.
               nanospec:  passivation PSG thickness, in angstroms
                          T    R    B    L    C      mean     sigma
               NITCTRL1: 4598 4697 4482 4448 4558 -> 4557 +/- 98
               inspect:  lots of ~1um hillocks have formed on tungsten
    -----------------------------------------------------------------------
         37.2  RTA LTO Densification
               Heatpulse1:  time = 30 sec, temp = 900 C, flow = 2.0 slpm Ar
               nanospec:  passivation PSG thickness, in angstroms
                          T    R    B    L    C      mean     sigma
               NITCTRL1: 4476 4592 4343 4364 4444 -> 4444 +/- 99
               nanospec:  oxide thickness in field
               cmos30-2: 16778 16448 16640 16766 16533 -> 16633 +/- 144
    -----------------------------------------------------------------------
         37.3  Low Stress Nitride Deposition: 
               tylan18, BSLOW.1, target=1750 A
                Flows (sccm):  DCS = 100, NH3 = 25, T = 835 C, P = 140 mT 
                time = 54 min (review previous DR on wand)
               Include NITCTRL1 (not NITCTRL2) and thickness ctrls. (Si).
               nanospec, prog2 R.I.=2.2: passivation nitride thickness
                           T    R    B    L    C      mean     sigma
               NITCTRL1:  2486 2504 2517 2493 2464 -> 2493 +/- 20
    -----------------------------------------------------------------------
    38.0  Inter CMOS-ustructure Contact Mask:  SNT (chrome-df) 
          - Wed Sep 29 1993
                 a) Photo Module: 1.0: thick g-line PR
                b) align to POLY-CPG
    -----------------------------------------------------------------------
    39.0  Nitride Passivation Etch - Thu Sep 30 1993
                Etch Module 2.0: Nitride Etch 
                (had to use tegal instead of lam1, which was down)
                tegal: 150mT, 200W, 80 sccm SF6, 1min 45sec etch
                nanospec:  oxide thickness in field left
                            T     R     B     L     C      mean     sigma
                cmos30-2: 16913 16364 16459 16828 16466 -> 16606 +/- 247
    -----------------------------------------------------------------------
    40.0  Oxide Passivation Etch
                a) Etch Module 4.0: Oxide Etch
                b) check for continuity in CMOS gate poly
                   It took 2 min to etch.
    -----------------------------------------------------------------------
    41.0  PR strip: see module 1.0
    -----------------------------------------------------------------------
    42.0  uStructure Poly1 Deposition:  target = 3000 A
    -----------------------------------------------------------------------
         42.1  Standard clean:  a) sink6: SP clean, DI rinse
                                b) 10 sec 10:1 HF dip, DI rinse
                               (reduced dip time to avoid undercutting PSG)
                               (used 15 sec 5:1 BHF dip instead)
               inspect: Exposed tungsten pads for contact testing
                        etched away in the pirahna.
    -----------------------------------------------------------------------
         42.2  Phosphorous-doped polysilicon deposition:  
               tylan16, DOPLY16A
                time = 1hr 50min (check DR on wand), temp.= 610 C +/- 6 C, 
                P = 375 mT, SiH4 = 100 sccm, PH3 = 1.0 sccm
               Include etching controls:  PLY1CTRL1, PLY1CTRL2
               nanospec:  SP1 polysilicon thickness
                           T    R    B    L    C      mean     sigma
               PLY1CTRL1: 3023 3009 3016 3032 3042 -> 3024 +/- 13
               4-point probe on PLY1CTRL1: 263 ohm/sq
    -----------------------------------------------------------------------
    43.0  uStructure Poly1 Mask:  SP1 (emulsion-cf) - Fri Oct  1 1993
               a) Photo Module 2.0: standard i-line PR
                  (I used 2um g-line PR)
               b) align to SNT layer
    -----------------------------------------------------------------------
    44.0  Poly1 Etch
                Etch Module 3.0: Poly Etch 
                7sec SF6, 36sec Cl2 + 10sec overetch Cl2
                nanospec, prog2 R.I.=2.2: nitride thickness left
                           T    C    B    L    R      mean     sigma
                NITCTRL1:  2340 2324 2216 2225 2264 -> 2274
    -----------------------------------------------------------------------
    45.0 PR strip: see module 1.0
               (include PSG1CTRL1 and PSG1CTRL2)
    -----------------------------------------------------------------------
    46.0  Sacrificial PSG Deposition: - Mon Oct  4 1993
    -----------------------------------------------------------------------
         46.1  Standard clean:  a) sink6: SP clean, DI rinse
    -----------------------------------------------------------------------
         46.2  Sacrificial PSG Deposition:  tylan20, VDOLTOC, target = 2 um
               Flows (sccm):  SiH4 = 60, PH3 = 10.3, O2 = 90,
               time:  2 hrs (check DR on wand), p=300mT, T=450C
               Include etching controls:  PSG1CTRL1 (near load), PSG1CTRL3,
                                      and PSG2CTRL2 (near pump)
               nanospec:  sacrificial PSG1 thickness
                           T      C     B     L     R      mean     sigma
               PSG1CTRL1: 22268 22846 22719 22396 22344 -> 22515 +/- 253
               PSG1CTRL2: 21349 22821 22580 21975 22114 -> 22168 +/- 572
    -----------------------------------------------------------------------
    47.0  RTA for Sacrificial PSG Densification
          Heatpulse1:  time = 30 sec, temp = 900 C, flow = 2.0 slpm Ar
          (also do PSG1CTRLs)
               nanospec:  densified sacrificial PSG1 thickness
                           T      R     B     L     C      mean     sigma
               PSG1CTRL2: 22391 21701 21676 22187 21874 -> 21966 +/- 313
    -----------------------------------------------------------------------
    48.0  Dimple Photo Mask:  SD1 (same as SD2) (chrome-df)
                a) Photo Module 2.0: standard i-line PR 
                                    (used 1um g-line instead)
                b) align to SP1 layer 
    -----------------------------------------------------------------------
    49.0  Dimple Formation
          Timed wet etch in 5:1 BHF.  (Check E.R. with PSG TW)
              2min 20sec, fresh 5:1 BHF
          target dimple depth =  1.0um (or half the SACOX thickness)
          inspect:  Dimples present.  Can't measure since there's
                    no process monitor. Color looks OK (not like poly).
    -----------------------------------------------------------------------
    50.0  PR strip:  see module 1.0
    -----------------------------------------------------------------------
    51.0  uStructure Anchor Photo Mask:  SG1 (chrome-df) - Tue Oct  5 1993
                a) Photo Module 1.0: thick g-line PR
                b) align to SP1 layer
    -----------------------------------------------------------------------
    52.0  Thick Oxide Etch
                a) Etch Module 4.0: Oxide Etch
                b) check for continuity in uStructural Poly1
                   Etch took 3 min 30 sec
                inspect: contacts are white/green/rose, depending on wafer
                      position, iv shows conduction between 250 to 1.5kohm

    -----------------------------------------------------------------------
    53.0 PR strip: see module 1.0
    -----------------------------------------------------------------------
    54.0 uStructure Poly2 Deposition:  - Wed Oct  6 1993
    -----------------------------------------------------------------------
          54.1  Standard clean:  a) sink6: SP clean, DI rinse
                                 b) 10 sec 10:1 HF dip, DI rinse
                                    (reduced dip time due to exposed PSG)
    -----------------------------------------------------------------------
          54.2  uStructure Poly2 Deposition - 
                tylan16, DOPLY16A, target=2.0um, 
                 time = 12 hrs (check DR on wand), temp.= 610 C +/- 6 C,
                 p= 375 mT, SiH4 = 100 sccm, PH3 = 1.0 sccm
                Include etching controls:  PLY2CTRL1, PLY2CTRL2
                tylan16 was inadvertently acked at 9 hrs 18 min dep time
                I decided to pull wafers out at this time.
                nanospec:  SP2 polysilicon thickness
                             T     R     B     L     C      mean     sigma
                PLY2CTRL1: 16085 16445 16024 16052 16048 -> 16131 +/- 177
    -----------------------------------------------------------------------
    55.0  PSG Oxide Mask Deposition - target = 0.5 um
           tylan20, VDOLTOC
           Flows (sccm):  SiH4 = 60, PH3 = 10.3, O2 = 90, p=300mT, T=450C
           time = 25 min (check DR on wand)
           Include etching controls:  PSG2CTRL1 and PSG2CTRL2
           nanospec:  PSG thickness (non-erodible mask for SP2 etch)
                        T    R    B    L    C     mean     sigma
           PSG2CTRL1: 4681 4625 4384 4660 4564 -> 4583 +/- 120
    -----------------------------------------------------------------------
    56.0  RTA Polysilicon stress relief anneal
          Heatpulse1:  time = 60 sec, temp = 900 C, flow = 2.0 slpm Ar
          inspect:  poly looks uniform, no bubbles
    -----------------------------------------------------------------------
    57.0  uStructure Poly2 Mask:  SP2 (emulsion-cf)
                a) Photo Module 2.0: standard i-line PR (must use i-line)
                b) align to SP1 layer 
    -----------------------------------------------------------------------
    58.0  Oxide Etch
                Etch Module 4.0: Oxide Etch
                59 sec to endpoint + 15 sec overetch
                inspect: I was worried about the 1um lines, since
                   they looked eroded to 0.5um due to the illusion of PR
                   over the oxide mask.  It turns out the lines
                   were fine.  There was still PR over the larger
                   oxide areas so I went ahead with the lam4 etch on faith.
    -----------------------------------------------------------------------
    59.0  Structural Poly2 Etch - Thu Oct  7 1993
                Etch Module 3.0: Poly Etch
                7 sec SF6, 4 min Cl2 + 1 min 20 sec overetch
                inspect: 1um lines look fine, poly stringers etched.
                nanospec:  sacrificial PSG1 thickness left
                            T      C     B     L     R      mean     sigma
                PSG1CTRL1: 21579 21670 21307 21026 20897 -> 21296
                PSG1CTRL3: 22051 22382 22347 21549 21683 -> 22002
    =======================================================================

                         SOG Planarization Module

    -----------------------------------------------------------------------
    60.0  uStructural Planarization - Fri Oct  8 1993
    -----------------------------------------------------------------------
         60.1  Standard clean:  a) sink8: SP clean, DI rinse
                                b) sink6: SP clean, DI rinse
    -----------------------------------------------------------------------
         60.2  Planarization 1st Dielectric (PLAD1)
               PSG Deposition:  tylan20, VDOLTOC, target = 0.7um
               Flows (sccm):  SiH4 = 60, PH3 = 10.3, O2 = 90,
               time = 39 min (check DR on wand), P=300mT, T=450C
               include PSG1CTRL1 through PSG1CTRL3
               nanospec:  pre-SOG PSG thickness
                            T    C    B    L    R      mean     sigma
               PLAD1CTRL1: 7352 7297 7219 7253 7072 -> 7239 +/- 106
    -----------------------------------------------------------------------
         60.3  Planarization 2nd Dielectric (PLAD2)  - 10/08/93
               SOG Application:  Allied Signal Accuglass 512
                                 warmed to ambient for 60min prior to use.
                a) dehydration bake at 120C (approx 60min)
                a) 1st coat: spinner1, 3000 rpm, 15 sec
                b) hot plate bakes: 1 min @ 90C, 1 min @ 150C, 1 min @ 250C
                c) 2nd coat: spinner1, 3000 rpm, 15 sec
                d) hot plate bakes: 1 min @ 90C, 1 min @ 150C, 1 min @ 250C
                nanospec: SOG index of refraction (Nf) and thickness (Tf)
                           T     C     B     L     R        mean
            SOG1CTRL1: Nf  1.313 1.369 1.353 1.430 1.362 -> 1.365
            SOG1CTRL1: Tf  9080  8876  8943  8934  8948  -> 8956 / 75
    -----------------------------------------------------------------------
        60.4  SOG cure:  tylan14, SVANNEAL, 60 min at 425C in N2
                (10' ramp up, 5' stab, 60' cure, 10' ramp dwn, 400C idle)
                nanospec: SOG index of refraction (Nf) and thickness (Tf)
                           T     C     B     L     R        mean
            SOG1CTRL1: Nf  1.359 1.364 1.369 1.357 1.346 -> 1.359
            SOG1CTRL1: Tf  8518  8329  8423  8401  8446  -> 8423 / 69
    -----------------------------------------------------------------------
        60.5  SOG Etch Back:  Etch Module 5.0 - Mon Oct 11 1993

                        SOG Etch Back
                   Technics-C Plasma Etcher

                P    (mT)        260 (non-regulated)
                RF   (W)         100
                SF6  (sccm)       13    (cf = 0.28)
                He   (sccm)       21    (cf = 1.46)
                time (min)         5

        * Note:  Due to the across-wafer nonuniformity of this system,
                 rotate wafers 180 degrees after half the etch time.
        nanospec:  oxide/SOG thickness after etchback
                    T       C       B       L       R       mean
        PLAD1CTRL1: 4970    4944    4901    4678    4808    4860 / 119
        SOG1CTRL1:  2665    2392    2326    2279    2193    2371 / 180

                PSG loss during EB = 7239 - 4860 = 2379A  ER =  476 A/min
                SOG loss during EB = 8367 - 2371 = 5996A  ER = 1199 A/min
    -----------------------------------------------------------------------
    61.0  Sacrificial PSG2 Deposition:  target = 2 um - Thu Oct 14 1993
    -----------------------------------------------------------------------
         61.1  Standard clean:  a) sink6: SP clean, DI rinse
    -----------------------------------------------------------------------
         61.2  Sacrificial PSG2 Deposition:  
               tylan20, VDOLTOC, target = 2 um
                Flows (sccm):  SiH4 = 60, PH3 = 10.3, O2 = 90,
                time = 2 hrs (check DR on wand), P=300mT, T=450C
               Include etching controls:  PSG3CTRL1 and PSG3CTRL2
               inspect: all wafers look fine, some small 1um PSG "bubbles"
                       in field, probably there from before dep.
                       comb finger gaps look clear, can see PSG sidewalls
    -----------------------------------------------------------------------
    62.0  Sacrificial PSG2 Densification
          Heatpulse1:  time = 30 sec, temp = 900 C, flow = 2.0 slpm Ar
          (also include PSG1CTRLs and PSG3CTRLs)
          inspect:  same bubbles in field, comb finger gaps are now dark
                    on all wafers.  All wafers have brown streaks in field,
                    where the SOG still exists.  The streaks are radial
                    out from the center, from the SOG spin.  This brown
                    color did not show up until after the RTA.
                    Occasional trenches had long cracks in the SOG.
          nanospec:  densified sacrificial PSG2 thickness
                          T      R     B     L     C      mean     sigma
          PSG3CTRL1: 20192 19983 19570 20214 19627 -> 19917 +/- 305
          PSG1CTRL1: 50253 49833 48501 50356 48288 -> 49446 +/- 983
          PSG1CTRL3: 50817 49603 48655 50987 48724 -> 49757 +/- 1111
    -----------------------------------------------------------------------
    63.0  Dimple Photo Mask:  SD3 (chrome-df) - Mon Oct 18 1993
                a) Photo Module 1.0: double thick g-line PR (2um-thick)
                b) align to SP2 layer
    -----------------------------------------------------------------------
    64.0  Dimple Formation
          Timed wet etch in 5:1 BHF.  2 min 20 sec (Check E.R. with PSG TW)
          target dimple depth =  1.0um (or half the PSG2 thickness)
          nanospec:  sacrificial PSG2 thickness for dimples (after etch)
                      T      R     B     L     C      mean     sigma
          PSG3CTRL1: 10899 11037 10937 11577 10256 -> 10941 +/- 470
             so dimple depth is about 19917 - 10941 = 8976 A
    -----------------------------------------------------------------------
    64a.0  Back Side PSG etch (this is not a "standard" MICS process step)
                a) Spin on 2um g-line PR, hardbake
                b) 14 min, 5:1 BHF etch (until backside dewets in water)
    -----------------------------------------------------------------------
    65.0  PR strip:  see module 1.0
    -----------------------------------------------------------------------
    66.0  uStructure Anchor Photo Mask:  SG2 (chrome-df) - Tue Oct 19 1993
                a) Photo Module 3.0: 4-times (4um) thickness g-line PR
                b) align to SP2 layer
    -----------------------------------------------------------------------
    67.0  Thick Oxide Etch - PSG2
                a) Etch Module 4.0: Oxide Etch
                b) check for continuity in uStructural Poly2
                etch time = 6 min 30 sec
                rotate wafers 180 deg after each 1 min etch
                inspect:  after 5 min etch, most contacts are etched to 
                  white, however, small SG2 contacts have extra SOG.  
                  The SOG creates round contacts with residual oxide in 
                  corners.  After 6 min total etch, contacts on all but  
                  side dies are clear and conducting on iv.
                  Check SP2-SP1 contacts at this time - they're ok.
    -----------------------------------------------------------------------
    68.0  PR strip: see module 1.0
    -----------------------------------------------------------------------
    69.0  uStructure Poly3 Deposition: - Wed Oct 20 1993
    -----------------------------------------------------------------------
          69.1  Standard clean:  a) sink6: SP clean, DI rinse
                                b) 15 sec 10:1 HF dip, DI rinse
    -----------------------------------------------------------------------
          69.2  uStructure Poly3 Deposition - 
                tylan16, DOPLY16A, target=1.0um
                 time = 6 hrs (check DR on wand), temp.=610 C +/- 6 C,
                 P = 375 mT, SiH4 = 100 sccm, PH3 = 1.0 sccm
                Include etching controls:  PLY3CTRL1, PLY3CTRL2
          nanospec:  second structural polysilicon thickness, PLY3
                      T      R     B     L     C      mean     sigma
          PLY3CTRL1: 11799 12104 11664 11697 12049 -> 11863 +/- 202
    -----------------------------------------------------------------------
    70.0  PSG Oxide Mask Deposition - target = 0.5 um - Mon Nov  1 1993
           tylan20, VDOLTOC
           Flows (sccm):  SiH4 = 60, PH3 = 10.3, O2 = 90, P=300mT, T=450C
           time = 20 min (check DR on wand)
           Include etching controls:  PSG4CTRL1 and PSG4CTRL2
           nanospec:  PSG4 thickness (non-erodible mask for PLY3 etch)
                       T    R    B    L    C      mean     sigma
           PSG4CTRL1: 3503 3522 3419 3471 3444 -> 3472 +/- 42
    -----------------------------------------------------------------------
    71.0  uStructure Poly3 Definition Mask:  SP3 (emulsion-cf) 
          - Tue Nov  2 1993
                a) Photo Module 3.0: 4X thickness g-line PR
                   (required because of poor planarization)
                   (used 3um-thick g-line PR instead)
                b) align to SP2 layer
    -----------------------------------------------------------------------
    72.0  Oxide Etch
                a) Etch Module 4.0: Oxide Etch
                   45 sec to endpt + 15 sec overetch
                b) 15 sec. 5:1 BHF dip in sink 8 to remove oxide stringers
    -----------------------------------------------------------------------
    73.0  Structural Poly3 Etch
                a) Etch Module 3.0: Poly Etch
                   7 sec SF6, 170 sec Cl2 to endpt (C), 120 sec overetch
                b) Poly3 stringer removal - technics-c
                   SF6 =13.0, He = 21.0, O2 = 0.0, power = 100 W
                   etch time = 0.5 min., inspect, rotate wafers 180 deg.
                   etch for additional time = 0.5 min. (if needed)
                   (etch required because of poor planarization)
            inspect:  the SF6 etch for stringer removal of cmos30-2
              was actually done after the SREL lithography step 77.1
              no poly3 stringers after 30 sec SF6 etch
    -----------------------------------------------------------------------
    74.0  PR strip:  see module 2.0
    -----------------------------------------------------------------------
    75.0  RTA PSG Densification and Polysilicon stress relief anneal
          Heatpulse1:  time = 30 sec, temp = 900 C, flow = 2.0 slpm Ar
                       two RTA cycles, so total time is 60 sec
    -----------------------------------------------------------------------
    76.0  Back Side Etch  (not done on cmos30-2)
    -----------------------------------------------------------------------
          76.1 PR spin, no exposure, hard bake: 60 min @ 120C
    -----------------------------------------------------------------------
          76.2 repeat 16.2
    -----------------------------------------------------------------------
          76.3 Etch back side of wafers as follows:
                a) dip off oxide in BHF (PSG3 oxide mask)
                b) wet etch poly-Si (structural poly3)
                c) dip oxide off in BHF (sacrificial PSG2)
                d) wet etch poly-Si (structural poly2)
                e) dip oxide off in BHF (sacrificial PSG oxide)
                f) wet etch poly-Si (ground-plane poly1)
                g) etch nitride in Tegal
                h) etch oxide off in BHF (oxide over W and over capacitor)
                i) wet etch poly-Si (capacitor poly)
                j) etch oxide in BHF (capacitor oxide)
                k) wet etch poly-Si (CMOS gate poly)
                l) final dip in BHF until back dewets
    -----------------------------------------------------------------------
          76.4  PR strip:  see module 1.0
    -----------------------------------------------------------------------
    77.0  uStructure Release
    -----------------------------------------------------------------------
          77.1  SREL photolithography (optional, and done for cmos30-2)
                a) Photo Module 2.0:  std g-line PR
                b) align to SP2
    -----------------------------------------------------------------------
          77.2  a) Wet etch: 10:1 BHF (sink8), or    - Mon Nov  8 1993
                   concentrated (49%) HF (sink7) - if SREL not used.
                   (agitate slowly, time: as required)
          For cmos30-2, we used 35 min, 5:1 BHF release in total
          darkness (covered with opaque bell jar) to inhibit
          electrochemical etching of polysilicon pads.
                b) DI rinse
                c) SP clean, 10min
          We did pirahna clean for 1hr.
                d) DI rinse
    -----------------------------------------------------------------------
          77.3  Dry: - Fri Nov 12 1993
                a) methol soak
                b) supercritical CO2 drying
    =======================================================================

frontend:  S. Fang/K. Voros
backend:   J. Bustillo/G. Fedder/C. Nguyen 



Backend MICS_2poly alignment strategy:


mask            type            name         aligns to     PR
--------------------------------------------------------------------------

METAL           emulsion-cf     CMF          POLY_CPG        2.0um g-line 
uS CONTACT      chrome-df       SNT          CPG             2.0um g-line
uS POLY1        emulsion-cf     SP1          SNT             std   i-line
DIMPLE          chrome-df       SD2/SD1      SP1             std   i-line 
uS ANCHOR       chrome-df       SG1          SP1             2.0um g-line
uS POLY2        emulsion-cf     SP2          SP1             std   i-line
DIMPLE2         chrome-df       SD3          SP2             2.0um g-line 
uS ANCHOR2      chrome-df       SG2          SP2             4.0um g-line
uS POLY3        emulsion-cf     SP3          SP2             4.0um g-line
release etch    chrome-df       SREL         SP2             2.0um g-line

         assuming 2.0um uStructural design rules, alignment
         should be within +/-1.0um a-w and +/-0.5um at ctr.

MICS Process Modules:

                        MICS Backend 
                      Plasma/RIE Etch Modules 
                        version 2.0
===========================================================================
 
        1.0                Tungsten Etch
    ----------------------------------------------------------
                           Tegal 701 RIE

                        SF6 = 80 sccm
                        Pin = 200 Watts
                        p   = 200 mT
                        T   = 40 C (temperature set at chiller)

        *Note:  Set forward power using Bird meter.  
                 Use matching network in manual mode.

                SF6 etch will also clear underlying TiN over field.

    -----------------------------------------------------------

        2.0                Nitride Etch
    -----------------------------------------------------------
                        Lam1 AutoEtch 490 Plasma Etch

                               step 2     step 4

                P   (mT)        375        300
                RF  (W)         250        100
                gap (cm)       1.35       2.50
                O2  (sccm)       -          5
                He  (sccm)       50         -
                SF6 (sccm)      175         50
                time           endpt       10% O/E
                
    ---------------------------------------------------------------

        3.0                Polysilicon Etch
    ---------------------------------------------------------------
                        Lam4 Rainbow Plasma Etch 
                        (standard recipe #400)
                        
                               step 5     step 7     step 8
                
                P   (mT)        400        425        425
                RF  (W)         200        275        275
                gap (cm)       1.00       0.80       0.80
                CL2 (sccm)        -        180        180
                He  (sccm)        -        400        400
                SF6 (sccm)      100         -         -
                time           7sec        endpt      O/E
                CH                         C
                delay                      15
                norm sec                   10
                norm val                  5000 
                trigger                    90
                %                          25

        * Note: HBr etch of structural poly will passivate sidewalls
                and may leave "grass" when thick poly is etched.
                Use the chlorinated etch process for SP layers.

    -------------------------------------------------------------

        4.0                Oxide Etch
    -------------------------------------------------------------
                        Lam2 AutoEtch 590 Plasma Etch

                                 step 2     step 4

                P   (Torr)        2.8        3.0        
                RF  (W)           850        700
                gap (cm)         0.38       0.40        
                He  (sccm)        120        110        
                CHF3(sccm)         30         35        
                CF4 (sccm)         90         30        
                time            endpt        O/E

   * Note: Overetching SP masking oxide w/ step #4 can cause polymerization
           and subsequent micromasking of SP layer during the SP etch,
           or difficulty making poly-poly contacts at SNT, SG1, or SG2.
           Any overetching should be done with an extension of step #2.
        
           Suggest excluding the overetch step (#4) except for CMOS 
           contacts (metal-silicon contacts not affected).

    --------------------------------------------------------------
    
===========================================================================
                                MICS Backend
                           Photolithography Modules
===========================================================================

1.0                2X Thick g-line PR (CMF and SD1 layers)
===========================================================================

         1  Dehydrate:  VWR Oven for 30 min. @ 120 C
    ----------------------------------------------------------------------
         2  HMDS vapor prime
    ----------------------------------------------------------------------
         3  Spin g-line resist:  KTI 820 (prog. 9), 
                                  target PR = 1.8-2.0um
                                 30sec @ 1500rpm, 
                                    soft bake: 60sec @ 120 C
    ----------------------------------------------------------------------
         4  Expose:  GCA2 6200-10X G-line wafer stepper
                                or
                     GCA1 6200-10X I-line wafer stepper 
                4.1  Focus/Exposure Matrix
                4.2  calculate appropriate F/E for thicker PR
                4.3  align to appropriate layer
    ----------------------------------------------------------------------
         5  Post exposure bake:  60sec @ 120 C (prog. 4)
    ----------------------------------------------------------------------
         6  Develop in MTI-Omnichuck:
               Kodak 932 2:1, 60 seconds. (prog. 1)
    ----------------------------------------------------------------------
         7  Develop Inspect (five sites)
    ----------------------------------------------------------------------
         8  Descum in Technics-C: O2 plasma, 50 Watts, 1 minute.
    ----------------------------------------------------------------------
         9  Hard bake in VWR oven: 60min @ 120 C convection
    ----------------------------------------------------------------------



2.0                Standard i-line PR (SNT, SP1, SG1, SP2, and SREL layers)
===========================================================================

         1  Dehydrate:  VWR Oven for 30 min. @ 120 C
    ----------------------------------------------------------------------
         2  HMDS:  Vapor prime
    ----------------------------------------------------------------------
         3  Spin I-line resist: Olin-Hunt I-line (prog15)
                                25 sec @ 4600 RPM, 
                                softbake: 60 sec @ 90 C
    ----------------------------------------------------------------------
         4  Expose:  GCA1 6200-10X I-line wafer stepper, 
                     align to appropriate layer
    ----------------------------------------------------------------------
         5  Post Exposure Bake on Eaton:  60 secs. @ 120 C
    ----------------------------------------------------------------------
         6  Develop in MTI-Omnichuck: 
                      Std. Olin-Hunt I-line (prog. 70)
    ----------------------------------------------------------------------
         7  Develop Inspect (five sites)
    ----------------------------------------------------------------------
         8  Descum in Technics-C: O2  plasma, 50 Watts, 1 minute.
    ----------------------------------------------------------------------
         9  Hard bake in VWR oven: 120 C, 60 min. convection
    ----------------------------------------------------------------------
    

3.0                4X Thick g-line PR (SG2 and SP3 masks)
===========================================================================

         1  Dehydrate:  VWR Oven for 30 min. @ 120 C
    ----------------------------------------------------------------------
         2  HMDS vapor prime
    ----------------------------------------------------------------------
         3  Spin g-line resist:  KTI 820 (prog. 9), 
                                  target PR = 1.8-2.0um
                                 30sec @ 1500rpm, 
                                    soft bake: 60sec @ 120 C
                                 ** repeat to get 3.6-4.0 um **
    ----------------------------------------------------------------------
         4  Expose:  GCA2 6200-10X G-line wafer stepper 
                     (larger depth of focus required)
                4.1  Focus/Exposure Matrix
                4.2  calculate appropriate F/E for thicker PR
                4.3  align to appropriate layer
    ----------------------------------------------------------------------
         5  Post exposure bake:  60sec @ 120 C (prog. 4)
    ----------------------------------------------------------------------
         6  Develop in MTI-Omnichuck:
               Kodak 932 2:1, 60 seconds. (prog. 1)
    ----------------------------------------------------------------------
         7  Develop Inspect (five sites)
    ----------------------------------------------------------------------
         8  Descum in Technics-C: O2 plasma, 50 Watts, 1 minute.
    ----------------------------------------------------------------------
         9  Hard bake in VWR oven: 60min @ 120 C convection
    ----------------------------------------------------------------------

===========================================================================

                Standard PR Strip Modules
    ===========================================================
        1.0  PR strip:  a) technics-c, 300W, O2, 10 min
                         b) sink8: 10 min SP clean, DI rinse
    ----------------------------------------------------------- 
        2.0  PR strip:  a) sink8: 10 min SP clean, DI rinse
                           (used after SP2 or SP3 etch)
    -----------------------------------------------------------
        3.0  PR strip:  a) technics-c, 300W, O2, 10 min - only!
                           (used after tungsten etch)
    ===========================================================

===========================================================================

Revised: 12/13/94 by fedder@ece.cmu.edu