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Emily Ruppel [CV]

PhD Student

eruppel@andrew.cmu.edu

Carnegie Mellon University
          CIC 410
          4720 Forbes Ave
          Pittsburgh, PA 15213



About

I am a PhD candidate in the Electrical and Computer Engineering department at CMU and a member of the ABSTRACT research group led by Professor Brandon Lucia. My primary research studies intermittent computing-- a field that enables tiny, batteryless, energy-harvesting devices to perform computationally intensive tasks despite frequent power failures.

Specifically, I build systems that allow batteryless devices to correctly interact with their physical environment using peripheral sensors and actuators. My work spans the full hardware-software stack; I design power system hardware, runtime software and programming models that expand the capabilities of batteryless computing and sensing systems.


Education

Carnegie Mellon University
2016 - Present

PhD in Electrical and Computer Engineering


Carnegie Mellon University
Awarded May 2019

M.S. in Electrical and Computer Engineering


University of Maryland, College Park
2012 - 2016

B.S. Electrical Engineering, Minor in Computer Engineering
Magna Cum Laude, with Gemstone Honors Citation

Research

Tartan-Artibeus-1: A Batteryless Satellite

Emily Ruppel, Brad Denby and Brandon Lucia

In Progress

In this ongoing project, we designed and built a solar-powered, batteryless PocketQube satellite. Our specific contribution is a flexible bus architecture that allows system designers to easily build upon our baseline power system and flight control board with additional compute and radio modules. Further, we have open-sourced our hardware design files, all of our software and our assembly procedure.

[project website]
Transactional Concurrency Control for Intermittent, Energy-Harvesting Computing Systems

Emily Ruppel and Brandon Lucia

PLDI 2019

The goal of this work is to simplify the process of adding asynchronous events to an intermittent execution. In this paper, we show that surprising errors can arise when asynchronous events triggered by hardware interrupts (e.g. from a sensor on the device) are added to code that will run intermittently. We present our system, Coati, which makes it easy for programmers to control the concurrent accesses made by scheduled tasks and asynchronous events.

[paper] [video abstract] [code] [slides]
A Reconfigurable Energy Storage Architecture for Energy-Harvesting Devices

Alexei Colin, Emily Ruppel and Brandon Lucia

ASPLOS 2018-- Best Paper, IEEE MICRO Top Picks Honorable Mention 2019

In this work, we observe that tasks in an intermittent system often have conflicting requirements. Tasks may have an atomicity constraint, a minimum energy requirement for the task to complete successfully, or a temporal constraint, the task must be run quickly in response to an external stimuli. We introduce the Capybara hardware/software system to dynamically reconfigure the size of the energy buffer to match the requirements of the ongoing (or upcoming) task.

[paper] [code]

Professional Experience

Arm Research: Devices, Circuits & Systems Group
May 2019 - Aug 2019

Built extensible programming support for intermittent execution on a Cortex-M0 with volatile and non-volatile memory using statically placed checkpoints. Tested the new programming model by modifying the Arm DesignStart Cortex-M0 RTL to simulate spontaneous power failures and reboots.


Northrop Grumman Mission Systems: Power Conversion Technology
May 2016 - Aug 2016

Contributed to the design of a point-of-load power supply for a radar antenna control board by using LTSPICE simulations to select power regulators and by drawing the resulting schematics using CAD tools. Tested and corrected errors in the initialization sequence of radar antenna control boards by applying knowledge of the LTPowerPlay software and an understanding of the onboard linear regulator clocking protocols.


IBM, Memory Development Department
Mar 2012 - Dec 2014

Assessed the compliance of a memory initialization sequence for the DDR4 LRDIMM with JEDEC specifications using digital logic analyzer traces of the system operation and corrected errors in the procedure. Conducted failure analysis of memory cards used in the Z Systems mainframe and presented these findings to assist a team seeking to identify the cause of a hardware malfunction.