CARNEGIE MELLON UNIVERSITY
18-240 Fundamentals of Computer Engineering
Instructor, TA, Lecture, and Lab Info, SPRING 2004

Overview:

This course introduces basic issues in design and verification of modern digital systems. Topics include: Boolean algebra, digital number systems and computer arithmetic, combinational logic design and simplification, sequential logic design and optimization, register-transfer design of digital systems, basic processor organization and instruction set issues, assembly language programming and debugging, and a hardware description language. Emphasis is on the fundamentals: the levels of abstraction and hardware description language methods that allow designers to cope with hugely complex systems, and connections to practical hardware implementation problems. Students will use computer-aided digital design software for simulation and synthesis and actual hardware implementation laboratories to learn about real digital systems. 3 hr. lec., 1 hr. rec., 3 hr. lab. Prerequisite: 18-100, Corequisite: 21-127.

Prerequisite:

If you are an ECE student, 18-100 Introduction to ECE. If you are a CS student, this is waived.

Corequisite:

21-127 Introduction to Modern Mathematics

Textbooks:

Fundamentals with Digital Logic Design with VERILOG, Stephen Brown & Zvonko Vranesic. This is required by everyone.

The Verilog® Hardware Description Language", Fifth Edition, Donald E. Thomas and Philip Moorby. Copyright 2002 by Kluwer Academic Publishers. Required by everyone.

Note that if you already bought the Fourth Edition of the Verilog book (it has a green cover), you could use it. However, it doesn't cover some of the recent changes in the language which we will use in class. The class notes will cover these changes and so you could probably get along with it. However, if you haven't bought either of the books yet, buy the Fifth Edition (reddish brown cover).

Also note that a recent listing on the CMU Bookstore's web page said that three books were required. This is not true. The two books required are listed above.

Lab Manual:

The lab manual is available on line on the Web page. View it there or print useful parts

Homeworks:

Policy is:
• Homework due at beginning of class.
  
• No late homeworks accepted. No excuses. Work handed in after the homeworks are picked up at beginning of class will not be graded. (Note: we drop the lowest homework score. If you miss a deadline, that's the one that will be dropped!)

Exams:

If you have a family emergency and can not attend the exam, you must contact Prof. Blanto before the start of the exam.

Grades

The course will be based on approximately 840 points distributed among the assignments in the following approximate manner. Please look up the word "approximate" in the dictionary before complaining that your grade ended up lower because one of the labs was 80 points rather than 75.

Breakdown of Points

CATEGORY	NUMBER OF POINTS	APPROXIMATE PERCENTAGE
10 homeworks (20 pts each, lowest score dropped)	180 pts	22%
2 midterm exams (100 pts each)	200 pts	24%
1 final exam	160 pts	20%
4 labs (approx:50 + 80 + 100 + 50 pts)	280 pts	34%
Total	820pts	100%

Regrading:

If we added up the points on your graded assignment incorrectly, tell the instructor of the course immediately via email only. If you wish to argue about the grading of a particular problem, the policy is:

You have 1 week from (including weekends) from the day any particular graded assignment is returned to you to appeal the grade assigned. So, if you got an assignment back on Thursday, you have till midnight the following Thursday to argue about the grade and request we change it. After the 1 week period is up, we will not change a grade for any reason. The practical implication of this is that if you think we made a mistake, you are responsible to act quickly to get us to correct it. Contact the instructor of the course immediately via email and explain your problem in the email message. We are going to be totally unsympathetic to folks who come whining to us about 1 point on Homework 2 the day before the Final exam!

Cheating:

Students are referred to the University Policy about Cheating and Plagiarism:

It shall be the policy in this course to discourage cheating as much as possible, rather than to try to trap and punish. On the other hand, in fairness to all concerned, cheating and plagiarism will be treated severely whenever found. Because a large part of the learning experience comes from interaction with your peers, students are encouraged to discuss assignments with each other. The material handed in for grading must, however, be the product of individual effort; anything else constitutes cheating.

A few practical points:

Protect your work from being copied; it is difficult to determine who copied from whom. Pick up all you printouts from a public printer. Shield your work from others during an exam.

Homework problems are meant to represent your own work. The course staff recognizes that homeworks are often done in groups, and we recognize that this approach can help you learn. But it only helps you learn if you, individually, do the problem. Hints from others are of great help. Solutions from others leads to cheating.

Lab projects in this course are the work of an individual lab group of two people. If your partner copies from another group, even without your knowledge, you are a party to cheating. Know what's being handed in.

When you hand in assignments that ask for Verilog simulations, the Cadence Verilog simulator should be used and your printouts should clearly identify you as the user and your file being executed/printed.

Study Groups:

Are a good idea. In the real world, engineers design things in teams, bounce ideas off their colleagues, and interact frequently with their peers. In 18-240 labs, on most projects you will work in pairs. Outside lab, a study group can give you a forum to describe your problems, get alternate perspectives on the material, and probably discover you are not the only one having trouble with some difficult concept from the course. Through such discussion you can learn a lot.

This does not mean you do your homeworks as shared assignments!! Don't turn in a solution generated by a group. Redo it yourself. 50% of the points in the class come from exams. If you cannot do the problems without your group, you have a problem. Talk to your group about ideas and methods and practice problems; do your own assignments.

Asking for Help:

When you need to ask questions, you have several alternatives.

1. Ask your TA: this is your first line of attack. Because you spend 3 hours (or more) per week in the lab, you have a lot a time to get to know your TA. Take advantage of this, and your TA's office hours, to ask for help. E-mail works too.

2. Ask the Professor: Take of advantage of office hours to stop by to ask questions. E-mail works too.

3. Make an appointment: with a TA or with the Prof, if your schedule doesn't let you get to regular office hours. Email is the easiest way to send us a message.

Old Material:

Throughout the course we will (sadly) be killing a lot of trees. We shall be handing out homework assignments, lab assignments, various solutions, and daily notes since the course will be mostly taught via overhead projection. If you fail to pick something up in class, extra copies of the handouts are available in the course secretary's office, HH 2110.

Most of the assignments are available on the web. We encourage you to access them there.

If, for some reason we cannot even imagine, you should choose to part with any of the material we have lovingly xeroxed for you, we encourage you to dump it in one of the blue paper recycling bins scattered around CMU, rather than in a trash can.

Bad Ideas:

A short, definitely incomplete list of options of ways not to ace 18-240:

 

1. Ignore this document.

That is, after you scanned the part about how points get allocated and how many homeworks you can blow off. Then, when you just desperately need to know something that is in this document - that you chose not to read - come running into our offices, looking all annoyed, and harass us. This always makes you look clever. Really.

2. Blow off class.

We will be presenting a lot of material, a lot of new concepts. We will hand out notes - incomplete notes with holes in them for you to fill in as we lecture - but you really need to be present to get the explanations and answers to good questions. If you want to regularly reconstruct this wealth of imparted wit and wisdom by copying your friends notes, well, good luck.

3. Blow off homeworks.

So, you think you can ace this course without doing any of the practice problems worth approximately 1/5 of all the points? Wow. Grading your exams ought to be a real hoot.

4. Don't keep up:

18-240 is made up of many basic topics. Taken individually, most of these topics look pretty straightforward, i.e., they pretty much make sense and you can test them in the lab. However, there are a lot of these concepts, and it's tough to dig yourself out a hole if you don't keep up weekly with the progress in the class. It's not too hard to catch up on a topic or two, but a month's worth of 18-240 covers a lot of new ground that you don't want to have to figure out the night before an exam

5. Don't prepare for lab:

Of course, we always say that labs are for debugging finished circuits in the presence of a wise and kind TA, and for ironing out any conceptual problems you have. And, of course, we go out of our way to make it possible for you to do big chunks of the labs outside of your scheduled 3 hours in HH1303 - by having software available for simulation and synthesis, etc. But, if you want to waltz into the lab without ever having looked at the assignment, and try to design, build, and debug it in real time, OK. It's always interesting to see the sort of designs produced by sleep-deprived sophomores.