Rachata Ausavarungnirun, Ph.D. Student     [ email ]

SAFARI, CALCM: Computer Architecture Lab @ CMU
Electrical & Computer Engineering, Carnegie Mellon University
Pittsburgh, Pennsylvania, USA

Rachata Ausavarungnirun

I am a graduate student at Carnegie Mellon. I also did my undergrad at Carnegie Mellon. I am from Bangkok, Thailand. My research interests are in heterogeneous architecture, memory subsystem, scheduling, storage system, and network on chip.

I work with my advisor Prof. Onur Mutlu in the SAFARI research group, part of the Computer Architecture Lab at Carnegie Mellon (CALCM). I am interested in designing a scalable and high performance heterogeneous architecture through a new memory controller design and scalable network on chip. In addition, I am also interested in providing service guarantee for different types of applications in an heterogeneous system including SoCs. I am supported by the Royal Thai Scholarship for both undergrate and graduate degrees.


  • Mohammad Fattah, Antti Airola, Rachata Ausavarungnirun, Nima Mirzaei, Pasi Liljeberg, Juha Plosila, Siamak Mohammadi, Tapio Pahikkala, Onur Mutlu and Hannu Tenhunen,
    "A Low-Overhead, Fully-Distributed, Guaranteed-Delivery Routing Algorithm for Faulty Network-on-Chips"
    Proceedings of the 9th ACM/IEEE International Symposium on Networks on Chip (NOCS 2015), Vancouver, Canada, September 2015.
  • Nandita Vijaykumar, Gennady Pekhimenko, Adwait Jog, Abhishek Bhowmick, Rachata Ausavarungnirun, Onur Mutlu, Chita Das, Mahmut Kandemir, and Todd C. Mowry,
    "A Case for Core-Assisted Bottleneck Acceleration in GPUs: Enabling Efficient Data Compression"
    Proceedings of the 42nd International Symposium on Computer Architecture (ISCA 2015), Portland, OR, June 2015.
  • Onur Kayiran, Nachiappan CN, Adwait Jog, Rachata Ausavarungnirun, Mahmut T. Kandemir, Gabriel H. Loh, Onur Mutlu, Chita R. Das,
    "Managing GPU Concurrency in Heterogeneous Architectures,"
    Proceedings of the Proceedings of the 47th International Symposium on Micro Architecture (MICRO) (MICRO 2014), Cambridge, UK, December 2014 .
  • Rachata Ausavarungnirun, Chris Fallin, Xiangyao Yu, Kevin Chang, Greg Nazario, Reetuparna Das, Gabriel H. Loh, Onur Mutlu,
    "Design and Evaluation of Hierarchical Rings with Deflection Routing"
    Proceedings of the 26th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2014), Paris, France, October 2014. [ pdf | Slides ]
  • Vivek Seshadri, Yoongu Kim, Chris Fallin, Donghyuk Lee, Rachata Ausavarungnirun, Gennady Pekhimenko, Yixin Luo, Onur Mutlu,
    Phillip B. Gibbons, Michael A. Kozuch, and Todd C. Mowry,
    "RowClone: Fast and Energy-Efficient In-DRAM Bulk Data Copy and Initialization"
    Proceedings of the 46th International Symposium on Microarchitecture (MICRO 2013), Davis, CA, December 2013. [ pdf | Slides ]
  • Reetuparna Das, Rachata Ausavarungnirun, Onur Mutlu, Akhilesh Kumar, Mani Azimi.
    Application-to-Core Mapping Policies to Reduce Memory System Interference in Multi-Core Systems
    Proceedings of the 19th International Symposium on High-Performance Computer Architecture (HPCA 2013), Shenzhen, China, February 2013. [ pdf | Slides ]
  • Kevin Chang, Rachata Ausavarungnirun, Chris Fallin, Onur Mutlu.
    HAT: Heterogeneous Adaptive Throttling for On-Chip Networks.
    Proceedings of the 24th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2012), New York, NY, October 2012.
    [ pdf | slides ]
  • HanBin Yoon, Justin Meza, Rachata Ausavarungnirun, Racheal A. Harding, Onur Mutlu.
    Row Buffer Locality Aware Caching Policies for Hybrid Memories.
    Proceedings of the 30th IEEE International Conference on Computer Design (ICCD 2012), Montreal, Quebec, Canada, September 2012.
    [ pdf | slides ]
    Best Paper Award (in Computer Systems and Applications track).
  • Reetuparna Das, Rachata Ausavarungnirun, Onur Mutlu, Akhilesh Kumar, Mani Azimi
    Application-to-Core Mapping Policies to Reduce Memory Interference in Multi-Core Systems.
    Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques (PACT 2012), Poster Session, Minneapolis, MN, September 2012.
  • Rachata Ausavarungnirun, Kevin Chang, Lavanya Subramanian, Gabriel. H. Loh, Onur Mutlu.
    Staged Memory Scheduling: Achieving High Performance and Scalability in Heterogeneous Systems.
    Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), Portland, OR, June 2012.
    [ pdf | slides (pptx) | slides (pdf) ]
  • Chris Fallin, Greg Nazario, Xiangyao Yu, Kevin Chang, Rachata Ausavarungnirun, Onur Mutlu.
    MinBD: Minimally-Buffered Deflection Routing for Energy-Efficient Interconnect.
    Proceedings of the 6th ACM/IEEE International Symposium on Networks-on-Chip (NOCS 2012), Lyngby, Denmark, May 2012.
    [ pdf | slides (pptx) | slides (pdf) ]
    One of the five papers nominated for the Best Paper Award by the Program Committee.
  • Kevin Chang, Rachata Ausavarungnirun, Chris Fallin, Onur Mutlu.
    Adaptive Cluster Throttling: Improving High-Load Performance in Bufferless On-Chip Networks.
    SAFARI Technical Report No. 2011-006. September 6, 2011.
  • Teaching

    I was a TA for 18-447, Introduction to Computer Architecture (Spring 2014 and Spring 2015)

    As an undergrad, I had the pleasure of serving as a TA for 18-240, Structure and Design of Digital Systems for 4 semesters (Fall 2008, Spring 2009, Fall 2009 and Spring 2010).

    Other interests

    Apart from my geeky side, I have been a photo enthusiast for the past 8 years.

    Here is the link to my 500px gallery.