Joint Invariant Estimation of RF impairments for Reconfigurable Radio Frequency(RF) Front-end

M. Jun, R. Negi, Y.-C. Wang, T. Mukherjee, X. Li, J. Tao, and L. Pileggi, “Joint Invariant Estimation of RF impairments for Reconfigurable Radio Frequency(RF) Front-end”, Globecom Workshop – Emerging Technologies for 5G Wireless Cellular Networks, 2014.

Experimental Demonstration of Four-Terminal Magnetic Logic Device with Separate Read- and Write-Paths, International Electron Devices Meeting

D. Bromberg, M. Moneck, V. Sokalski, L. Pileggi, J-G. Zhu, “Experimental Demonstration of Four-Terminal Magnetic Logic Device with Separate Read- and Write-Paths, International Electron Devices Meeting”, December 2014.

All-Magnetic MRAM Based on Four Terminal mCell Device

D.M. Bromberg, E. Sumbul, J-G. Zhu and L. Pileggi, “All-Magnetic MRAM Based on Four Terminal mCell Device”, 13th Joint MMM/Intermag Conference, November 2014.

Environment-adaptable efficient optimization for programming of reconfigurable radio frequency (RF) receivers

Minhee Jun, Jun Tao, Ying-Chih Wang, Shihui Yin, Rohit Negi, Xin Li, Tamal Mukherjee and Lawrence Pileggi, “Environment-adaptable efficient optimization for programming of reconfigurable radio frequency (RF) receivers”, IEEE Military Communications Conference (MILCOM), 2014.

Algorithm/Hardware Co-optimized SAR Image Reconstruction with 3D-stacked Logic in Memory

F. Sadi, B. Akin, D. Popovici, J. Hoe, L. Pileggi, F. Franchetti, “Algorithm/Hardware Co-optimized SAR Image Reconstruction with 3D-stacked Logic in Memory”, Eighteenth Annual High Performance Embedded Computing (HPEC) Workshop at MIT Lincoln Laboratory, September 2014.

A Wideband RF Receiver with >80 dB Harmonic Rejection Ratio

R. Liu, L. Pileggi and J. Weldon, “A Wideband RF Receiver with >80 dB Harmonic Rejection Ratio”, Int’l Custom Integrated Circuits Conference, September 2014.

Sub-20 nm Design Technology Co-Optimization for Standard Cell Logic

K. Vaidyanathan, L. Liebmann, A. Strojwas, L. Pileggi, “Sub-20 nm Design Technology Co-Optimization for Standard Cell Logic”, Int’l Conference on Computer-Aided Design, November 2014.

Integrating Emerging Devices and CMOS for Efficient Cellular Neural Networks

T. Jackson, V. Calayir and L. Pileggi, “Integrating Emerging Devices and CMOS for Efficient Cellular Neural Networks”, Proceedings of the SRC Techcon Conference, September 2014.

Efficient and Secure Intellectual Property (IP) Design with Split Fabrication

K. Vaidyanathan, R. Liu, E. Sumbul, Q. Zhu, F. Franchetti, L. Pileggi, “Efficient and Secure Intellectual Property (IP) Design with Split Fabrication”, Hardware-Oriented Security and Trust, May 2014.

Building Trusted ICs using Split Fabrication

K. Vaidyanathan, B. P. Das, E. Sumbul, R. Liu, L. Pileggi, “Building Trusted ICs using Split Fabrication”, Hardware-Oriented Security and Trust, May 2014.