An 8.5mW 5GS/s 6b Flash ADC with Dynamic Offset Calibration in 32nm CMOS SOI
V. H.-C. Chen and L. Pileggi, “An 8.5mW 5GS/s 6b Flash ADC with Dynamic Offset Calibration in 32nm CMOS SOI”, in IEEE Symp. VLSI Circuits, June 2013.
V. H.-C. Chen and L. Pileggi, “An 8.5mW 5GS/s 6b Flash ADC with Dynamic Offset Calibration in 32nm CMOS SOI”, in IEEE Symp. VLSI Circuits, June 2013.
V. Calayir and L. Pileggi, “Fully-Digital Oscillatory Associative Memories Enabled by Non-volatile Logic”, International Joint Conference on Neural Networks, August 2013.
Carnegie Mellon University
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