An 8.5mW 5GS/s 6b Flash ADC with Dynamic Offset Calibration in 32nm CMOS SOI

V. H.-C. Chen and L. Pileggi, “An 8.5mW 5GS/s 6b Flash ADC with Dynamic Offset Calibration in 32nm CMOS SOI”, in IEEE Symp. VLSI Circuits, June 2013.

Fully-Digital Oscillatory Associative Memories Enabled by Non-volatile Logic

V. Calayir and L. Pileggi, “Fully-Digital Oscillatory Associative Memories Enabled by Non-volatile Logic”, International Joint Conference on Neural Networks, August 2013.