Automated Testability Enhancements for Logic Brick Libraries

J. Brown, B. Taylor, R. D. Blanton, and L. Pileggi, “Automated Testability Enhancements for Logic Brick Libraries”, Proceedings of Design and Test Europe, March 2008.

Digital circuit design challenges and opportunities in the era of nanoscale CMOS

Benton Calhoun, Yu Cao, Xin Li, Ken Mai, Lawrence Pileggi, Rob Rutenbar and Kenneth Shepard, “Digital circuit design challenges and opportunities in the era of nanoscale CMOS”, Proceedings of The IEEE (PTI), vol. 96, no. 2, pp. 343-365, February 2008.