A Gate Delay Model for High Performance CMOS
F. Dartu, N. Menezes, J. Qian and L.T. Pillage, “A Gate Delay Model for High Performance CMOS”, Proceedings Design Automation Conference, June 1994.
Archive for month: June, 1994
OTTER: Optimal Termination of Transmission Lines Excluding Radiation
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpR. Gupta and L.T. Pillage, “OTTER: Optimal Termination of Transmission Lines Excluding Radiation”, Proceedings Design Automation Conference, June 1994.
On the Stability of Moment- Matching Approximations in Asymptotic Waveform Evaluation
/0 Comments/in Electronic Design Automation, Peer Reviewed, Publications /by awpD.F. Anastaskis, N. Gopal, S.Y. Kim and L.T. Pillage, “On the Stability of Moment- Matching Approximations in Asymptotic Waveform Evaluation”, IEEE Transactions on Computer-Aided Design, pp. 729-736, June 1994.
RICE: Rapid Interconnect Circuit Evaluation Using Asymptotic Waveform Evaluation
/0 Comments/in Electronic Design Automation, Peer Reviewed, Publications /by awpC. Ratzlaff and L.T. Pillage, “RICE: Rapid Interconnect Circuit Evaluation Using Asymptotic Waveform Evaluation”, IEEE Transactions on Computer-Aided Design, pp. 763-776, June 1994.
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