Curriculum Vitae

This CV is also available as a PDF here.

Peter A. Milder
Carnegie Mellon University
Dept. of Electrical and Computer Engineering
5000 Forbes Ave.
Pittsburgh, PA 15213

E-mail: pam@ece.cmu.edu
Web: http://www.ece.cmu.edu/~pam/

Research Interests

Domain-specific languages and tools for the automatic generation and optimization of hardware for digital signal processing and computer vision; design for field-programmable gate array (FPGA) and application- specific integrated circuit (ASIC).

Education

Research

A full research statement including ongoing work and future plans is available by request.

Computer Generation of Hardware for DSP Transforms

This work focuses on automatic hardware generation of FPGA and ASIC cores for the domain of linear signal transforms (most importantly, the fast Fourier transform or FFT). In [1] (below) I provide an overview of the Spiral hardware generation framework, a hardware compilation and optimization tool that uses a mathematical formula language to represent transform algorithms and sequential hardware structures. By formally connecting structure within an algorithm with microarchitectural freedoms, the tool is able to symbolically manipulate algorithms and datapaths in order to best match desired cost/performance characteristics. The resulting system produces high quality designs over a very wide tradeoff space. The system is able to produce cores that compare well with existing designs in the literature or in IP libraries and enables higher performance/cost design points than otherwise available. In 2005, I created a web-based version of this tool that generates Verilog implementations of the FFT (http://www.spiral.net/hardware/dftgen.html), and I have updated it as my research progressed; visitors have used it to generate and download more than 12,000 designs.

References [12] and [13] address the critical problem of on-chip data reordering and buffering for transforms. References [9] and [16]–[19] discuss other aspects of this work, including hardware/software co-design and hardware cost modeling. [8] investigates the future of heterogeneous computing and uses our generated FFT hardware as an example application.

Real-Time OFDM Hardware for Optical Interconnect

A natural application of my work is orthogonal frequency division multiplexing (OFDM), a communications technique that requires very high throughput FFTs. Since 2007, I have collaborated with researchers at University College London and Intel Labs Pittsburgh to produce real-time hardware OFDM implementations for optical links, where the cost and performance of the FFT is critical. In [11], [14], and [15], we use FPGAs to implement and test real-time optical OFDM systems; in [2]–[4], [7], and [10], we examine area/power/performance tradeoffs of ASIC implementations. Lastly, [5], [6] study application- specific datatype and noise analysis/optimization.

Teaching Experience

A full statement of teaching philosophy and future plans is available by request.

Co-instructor, 18-202, Mathematical Foundations of Electrical Engineering. Carnegie Mellon University, Spring 2011.

Teaching Assistant, 18-290/18-396, Signals and Systems. Carnegie Mellon University, Fall 2009.

Teaching Assistant, 18-240, Fundamentals of Computer Engineering. Carnegie Mellon University, Fall 2006 and Fall 2007.

Teaching Assistant, 18-100, Introduction to Electrical and Computer Engineering. Carnegie Mellon University, Summer 2005, 2006, and 2007.

Teaching Assistant, 18-360, Introduction to Computer-Aided Digital Design. Carnegie Mellon University, Spring 2004.

Guest lectures, Carnegie Mellon University:
18-240, Fundamentals of Computer Engineering (2006, 2007, 2008, 2010)
18-447, Introduction to Computer Architecture (2009)
18-290/18-396, Signals and Systems (2009)

Patents

Markus Püschel, Peter A. Milder, and James C. Hoe. “System and Method for Designing Architecture for Specified Permutation and Datapath Circuits for Permutation.” Application filed October 2008.

Professional Service

External reviewer for ICASSP (2012), ISCAS (2012, 2009, 2007), IEEE Wireless Comm. and Netw. Conf (2012), ACM Trans. Arch. and Code Opt. (2011), IEEE Trans. VLSI (2011, 2009), IEEE Trans. Circuits and Systems (2010), HiPEAC (2009), Generative and Transformational Techniques in Software Eng. (2009), PACT (2008), EUSIPCO (2008), ACM Computing Frontiers (2008), ACM Workshop on Partial Evaluation and Program Manip. (2008), IEEE Trans. Signal Processing (2008, 2007), ICIP (2006), IEEE Signal Processing Letters (2005)..

IEEE member (2005–).

ACM student member (2005–).

Carnegie Mellon Graduate Student Assembly, ECE Department Representative, February 2007 – August 2010.

Awards and Honors

Finalist, ACM Student Research Competition, 2010. (Second place, Design Automation Conference.)

Best paper nominee (10 papers selected out of 147), ACM/IEEE Design Automation Conference, 2008.

Best Project Award, 18-765 Digital System Testing and Testable Design, Carnegie Mellon University, December 2008. Sponsored by AMD.

College of Engineering Honors, Carnegie Mellon University, 2004.

University Honors, Carnegie Mellon University, 2004.

Dean’s List, Carnegie Mellon University, Spring 2004, Fall 2003, Spring 2003, Fall 2002, Fall 2000

Industry Experience

Intern, Lockheed Martin Corporation, Moorestown, NJ, (May 2001 – August 2001, May 2002 – August 2002).

Journal/Conference Publications (Reviewed)

  1. Peter Milder, Franz Franchetti, James C. Hoe, and Markus Püschel. “Computer Generation of Hardware for Linear Digital Signal Processing Transforms.” To appear in ACM Transactions on Design Automation of Electronic Systems.

  2. Peter A. Milder, Rachid Bouziane, Robert Koutsoyannis, Christian R. Berger, Yannis Benlachtar, Robert I. Killey, Madeleine Glick, and James C. Hoe. “Design and Simulation of 25 Gb/s Optical OFDM Transceiver ASICs.” To appear in Optics Express. (Extended version of ECOC 2011 paper, below.)

  3. Rachid Bouziane, Peter A. Milder, Robert Koutsoyannis, Yannis Benlachtar, James C. Hoe, Madeleine Glick, and Robert I. Killey. “Dependence of Optical OFDM Transceiver ASIC Compexity on FFT Size/” To appear at Optical Fiber Conference (OFC), 2012.

  4. Rachid Bouziane, Peter A. Milder, Robert Koutsoyannis, Yannis Benlachtar, Christian R. Berger, James C. Hoe, Markus Püschel, Madeleine Glick, and Robert I. Killey. “Design Studies for ASIC Implementations of 28 GS/s Optical QPSK- and 16-QAM-OFDM Transceivers.” Optics Express, Vol. 19, Issue 21, pp. 20857—20864, 2011.

  5. Rachid Bouziane, Robert Koutsoyannis, Peter A. Milder, Yannis Benlachtar, James C. Hoe, Markus Püschel, Madeleine Glick, and Robert I. Killey. “Optimizing FFT Precision in Optical OFDM Transceivers.” IEEE Photonics Technology Letters, Vol. 23, No. 20, pp. 1550-1552, 2011.

  6. Christian R. Berger, Yannis Benlachtar, Robert I. Killey, and Peter A. Milder. “Theoretical and Experimental Evaluation of Clipping and Quantization Noise for Optical OFDM.” Optics Express, Vol. 19, Issue 18, pp. 17697-17712, 2011.

  7. Peter A. Milder, Rachid Bouziane, Robert Koutsoyannis, Christian R. Berger, Yannis Benlachtar, Robert I. Killey, Madeleine Glick, and James C. Hoe. “Design and Simulation of 25 Gb/s Optical OFDM Transceiver ASICs.” Proceedings of European Conference on Optical Communication (ECOC), 2011.

  8. Eric S. Chung, Peter A. Milder, James C. Hoe, and Ken Mai. “Single-chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPUs?” Proceedings of IEEE/ACM International Symposium on Microarchitecture (MICRO), 2010.

  9. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel. “Hardware Implementation of the Discrete Fourier Transform with Non-Power-of-Two Problem Size.” Proceedings of International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2010.

  10. Rachid Bouziane, Peter A. Milder, Robert Koutsoyannis, Yannis Benlachtar, Christian R. Berger, James C. Hoe, Markus Püschel, Madeleine Glick, and Robert I. Killey. “Design Studies for an ASIC Implementation of an Optical OFDM Transceiver.” Proceedings of the European Conference on Optical Communication (ECOC), 2010.

  11. Yannis Benlachtar, Philip M. Watts, Rachid Bouziane, Peter A. Milder, Robert Koutsoyannis, James C. Hoe, Markus Püschel, Madeleine Glick, and Robert I. Killey. “Real-Time Digital Signal Processing for the Generation of Optical Orthogonal Frequency Division Multiplexed Signals.” IEEE Journal of Selected Topics in Quantum Electronics, Vol. 16, Issue 5, pp. 1235-1244, Sep.—Oct., 2010.

  12. Markus Püschel, Peter A. Milder, and James C. Hoe. “Permuting Streaming Data Using RAMs.” Journal of the ACM, Vol. 56, Issue 2, 2009.

  13. Peter A. Milder, James C. Hoe, and Markus Püschel. “Automatic Generation of Streaming Datapaths for Arbitrary Fixed Permutations.” Proceedings of Design, Automation and Test in Europe (DATE), 2009.

  14. Yannis Benlachtar, Philip M. Watts, Rachid Bouziane, Peter A. Milder, Robert Koutsoyannis, James C. Hoe, Markus Püschel, Madeleine Glick, and Robert I. Killey. “21.4 GS/s Real-Time DSP-Based Optical OFDM Signal Generation and Transmission over 1600 km of Uncompensated Fibre.” Proceedings of European Conference on Optical Communication (ECOC), 2009.

  15. Yannis Benlachtar, Philip M. Watts, Rachid Bouziane, Peter A. Milder, Deepak Rangaraj, Anthony Cartolano, Robert Koutsoyannis, James C. Hoe, Markus Püschel, Madeleine Glick, and Robert I. Killey. “Generation of Optical OFDM Signals Using 21.4 GS/s Real Time Digital Signal Processing.” Optics Express, Vol. 17, Issue 20, 2009.

  16. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel. “Formal Datapath Representation and Manipulation for Implementing DSP Transforms.” Proceedings of ACM/IEEE Design Automation Conference (DAC), 2008.

  17. Paolo D'Alberto, Peter A. Milder, Aliaksei Sandryhaila, Franz Franchetti, James C. Hoe, José M. F. Moura, Markus Püschel, and Jeremy Johnson. “Generating FPGA-Accelerated DFT Libraries.” Proceedings of IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2007.

  18. Peter A. Milder, Mohammad Ahmad, James C. Hoe, and Markus Püschel. “Fast and Accurate Resource Estimation of Automatically Generated Custom DFT IP Cores.” Proceedings of ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), 2006.

  19. Grace Nordin, Peter A. Milder, James C. Hoe, and Markus Püschel. “Automatic Generation of Customized Discrete Fourier Transform IPs”. Proceedings of ACM/IEEE Design Automation Conference (DAC), 2005.

Workshop Papers, Invited Papers, Posters, and Technical Reports

  1. Robert I. Killey, Yannis Benlachtar, Rachid Bouziane, Peter A. Milder, Robert J. Koutsoyannis, Christian R. Berger, James C. Hoe, Markus Püschel, Philip M. Watts, and Madeleine Glick. “Recent Progress on Real-Time DSP for Direct Detection Optical OFDM Transceivers.” Invited paper, to appear at Optical Fiber Communications Conference (OFC), 2011.

  2. Yannis Benlachtar, Rachid Bouziane, Peter A. Milder, Robert Koutsoyannis, Christian R. Berger, James C. Hoe, Markus Püschel, Philip M. Watts, Madeleine Glick, and Robert I. Killey. “Real-time DSP-based Optical OFDM Transmission.” Invited paper, IEEE Photonics Society Annual Meeting, 2010.

  3. Yannis Benlachtar, Rachid Bouziane, Robert I. Killey, Christian Berger, Peter A. Milder, Robert Koutsoyannis, James C. Hoe, Markus Püschel, and Madeleine Glick. “Optical OFDM for the Data Center.” Invited paper, International Conference on Transparent Optical Networks, 2010.

  4. Robert I. Killey, Philip M. Watts, Yannis Benlachtar, Robert Waegemans, Rachid Bouziane, Ramanan Thiruneelakandan, Peter A. Milder, Deepak Rangaraj, Anthony Cartolano, Robert Koutsoyannis, James C. Hoe, Markus Püschel, Madeleine Glick, and Polina Bayvel. “FPGA-Based Optical Transmitters for Electronic Predistortion and Advanced Signal Format Generation.” Invited paper, Annual Meeting of the IEEE Lasers and Electro-Optics Society (LEOS), 2009.

  5. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel. “Linear Transforms: From Math to Efficient Hardware.” Design Automation Conference (DAC) High-Level Synthesis Workshop, 2008. Poster and extended abstract.

  6. Franz Franchetti, Yevgen Voronenko, Peter A. Milder, Srinivas Chellappa, Marek Telgarsky, Hao Shen, Paolo D'Alberto, Frédéric de Mesmay, James C. Hoe, José M. F. Moura and Markus Püschel. “Domain-Specific Library Generation for Parallel Software and Hardware Platforms.” Proceedings of NSF Next Generation Software Program Workshop (NSFNGS), 2008.

  7. Franz Franchetti, Daniel McFarlin, Frédéric de Mesmay, Hao Shen, Tomasz Wlodarczyk, Srinivas Chellappa, Marek Telgarsky, Peter A. Milder, Yevgen Voronenko, Qian Yu, James C. Hoe, José M. F. Moura, and Markus Püschel. “Program Generation with Spiral: Beyond Transforms.” Proceedings of High Performance Embedded Computing (HPEC), 2008.

  8. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel. “FFT Compiler: From Math to Efficient Hardware.” Proceedings of IEEE High Level Design, Validation and Test Workshop (HLDVT), 2007. Invited short paper.

  9. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel. “Fast Fourier Transform on FPGA: Design Choices and Evaluation.” ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), 2007. Poster and abstract.

  10. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel. “Discrete Fourier Transform Compiler: From Mathematical Representation to Efficient Hardware.” Technical Report #CSSI 07-01. Carnegie Mellon University, Center for Silicon System Implementation, 2007.

  11. Paolo D'Alberto, Peter A. Milder, Franz Franchetti, James C. Hoe, Markus Püschel, and José M. F. Moura. “Discrete Fourier Transform Compiler for FPGA and CPU/FPGA Partitioned Implementations.” Proceedings of High Performance Embedded Computing (HPEC), 2006.

References

References available by request.