I am an 8th year PhD candidate at the Carnegie Mellon University (CMU) department of Electrical & Computer Engineering (ECE). Currently, I am completing my dissertation while working remotely from Ecole Polytechnique Fédérale de Lausanne (EPFL) at the Parallel Systems Architecture (PARSA) lab.
My research interests are in the area of computer architecture, with particular emphasis on the design of efficient server systems. Ever-increasing computational demand has already pushed traditional and cloud datacenters to unsustainable extremes - tens of thousands of servers consuming megawatts of electrical power and occupying football-field sized warehouses. My primary research objective is to understand the fundamental properties and interactions of application software, operating systems, networks, processor microarchitecture, and datacenter dynamics, to enable software and hardware co-design of high-performance, power-efficient, and compact servers.
| 2012 | |
| [17] | Scale-Out Processors , In 39th International Symposium on Computer Architecture (ISCA), 2012. [bib] [pdf] |
| [16] | Clearing the Clouds: A Study of Emerging Scale-out Workloads on Modern Hardware , In 17th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2012. (recognized as Best Paper by the program committee) [bib] [pdf] |
| 2011 | |
| [15] | Proactive Instruction Fetch , In 44th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2011. [bib] [pdf] |
| [14] | Toward Dark Silicon in Servers , In IEEE Micro, volume 31, 2011. [bib] [pdf] |
| [13] | Cuckoo Directory: A Scalable Directory for Many-Core Systems , In 17th IEEE International Symposium on High Performance Computer Architecture (HPCA), 2011. (selected by the program committee for Best Student Papers session) [bib] [pdf] |
| [12] | Spatial Memory Streaming , In Journal of Instruction-Level Parallelism (JILP), volume 13, 2011. [bib] [pdf] |
| 2010 | |
| [11] | Near-Optimal Cache Block Placement with Reactive Nonuniform Cache Architectures , In IEEE Micro's Top Picks, volume 30, 2010. (original at ISCA'09) [bib] [pdf] |
| [10] | Making Address-Correlated Prefetching Practical , In IEEE Micro's Top Picks, volume 30, 2010. (original at ISCA'09) [bib] [pdf] |
| [9] | TurboTag: lookup filtering to reduce coherence directory power , In International Symposium on Low Power Electronics and Design (ISLPED), 2010. [bib] [pdf] |
| 2009 | |
| [8] | Reactive NUCA: near-optimal block placement and replication in distributed caches , In 36th International Symposium on Computer Architecture (ISCA), 2009. (recognized as Top Picks of 2009 by IEEE Micro) [bib] [pdf] |
| [7] | Practical Off-Chip Meta-Data for Temporal Memory Streaming , In 15th International Symposium on High Performance Computer Architecture (HPCA), 2009. (recognized as Top Picks of 2009 by IEEE Micro) [bib] [pdf] |
| 2008 | |
| [6] | Temporal Instruction Fetch Streaming , In 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2008. [bib] [pdf] |
| [5] | Cache bursts: A new approach for eliminating dead blocks and increasing cache efficiency , In 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2008. [bib] [pdf] |
| [4] | Temporal Streams in Commercial Server Applications , In 2008 IEEE International Symposium on Workload Characterization (IISWC), 2008. [bib] [pdf] |
| 2007 | |
| [3] | Last-Touch Correlated Data Streaming , In 2007 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2007. [bib] [pdf] |
| 2006 | |
| [2] | SimFlex: Statistical Sampling of Computer System Simulation , In IEEE Micro, volume 26, 2006. [bib] [pdf] |
| 2003 | |
| [1] | Analysis of IC Manufacturing Process Deformations: An automated approach using SRAM bit fail maps , In 29th International Symposium for Testing and Failure Analysis, 2003. [bib] [pdf] |
Computer architecture, with particular emphasis on the design of efficient server systems. My primary research objective is to understand the fundamental properties and interactions of application software, operating systems, networks, processor microarchitecture, and datacenter dynamics, to enable software and hardware co-design of high-performance, power-efficient, and compact servers.
These days, it seems like everyone's favorite hobby is to travel. Below is a map which shows the countries I visited.