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research [2014/04/28 11:58]
jhoe
research [2015/07/20 21:20] (current)
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====== Research ====== ====== Research ======
                                           
-James C. Hoe is interested in many aspects of computer architecture and digital hardware design.  His current research focuses on computer architecture, processor microarchitecture, simulation and FPGA emulation of computer systems, and tools for high-level hardware design and synthesis. ([[http://scholar.google.com/citations?sortby=pubdate&hl=en&user=KwUpfxYAAAAJ&view_op=list_works |Google Scholar Profile]])+James C. Hoe is interested in many aspects of computer architecture and digital hardware design.  His current research focuses on computer architecture, reconfigurable computing and high-level hardware design and synthesis. ([[https://scholar.google.com/citations?user=ZnRhcFUAAAAJ&hl=en |Google Scholar Profile]], [[research#select_past_papers |select papers]] and [[students#graduated_students  | student theses]])
-Many of my projects involve collaborations with colleagues at CMU and other universities/institutions.  These collaborations have enabled me to work in broad and multidisciplinary areas.  I also make my research artifacts [[Research#Downloads_and_Demos |available publicly]] to invite greater research collaborations and interactions. 
-== Summer Undergraduate Research Opportunities== 
- 
-CMU undergrads should email me or visit me during my office hours. International and US undergraduate students interested in summer research at CMU/ECE can [[http://www.ece.cmu.edu/programs-admissions/bachelors/internship/index.html |apply here]]. (The website opens between December and early spring for applications for the coming summer.) 
===== Active Projects ===== ===== Active Projects =====
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===== Downloads and Demos ===== ===== Downloads and Demos =====
-  * [[http://www.ece.cmu.edu/~coram/doku.php?id=corflow_beta |CoRAM demo and downloads]] +  * Active Development 
- * [[http://www.ece.cmu.edu/~mpapamic/connect |CONNECT Network-on-chip RTL Generator]] +    * [[http://www.ece.cmu.edu/~coram/doku.php?id=corflow_beta |CoRAM demo and download]] 
- * [[http://www.t-piper.net |T-piper tools, examples and tutorials]] +   * [[http://www.ece.cmu.edu/~mpapamic/connect |CONNECT Network-on-chip RTL Generator]] 
-  * [[http://www.spiral.net/hardware/dftgen.html| FFT Hardware IP Generator]] +   * [[http://www.ece.cmu.edu/coram/doku.php?id=graphgencnn |GraphGen demo and download]] 
- * [[http://www.ece.cmu.edu/~protoflex/doku.php#instructions_for_obtaining_the_source_code | ProtoFlex Opensource]]+  * Frozen Snapshots (i.e., the student responsible graduated)   
 +    * [[http://www.spiral.net/hardware/dftgen.html| FFT Hardware IP Generator]] (Peter Milder now at SUNY Stony Brook) 
 +   * [[http://www.t-piper.net |T-piper tools, examples and tutorials]] ( Eriko Nurvitadhi now at Intel Labs) 
 +    * [[http://www.ece.cmu.edu/~protoflex/doku.php#instructions_for_obtaining_the_source_code | ProtoFlex Opensource]] (Eric Chung now at MSR)
 +===== Select Past Papers =====
 +
 +    * **Computer Generation of Hardware for Digital Signal Processing Transforms**. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel.  ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 17 Issue 2, April 2012.  ([[http://portal.acm.org/citation.cfm?id=2159547 |acm]] | [[digital_signal_processing_hardware |project]])
 +    * **CONNECT: Re-Examining Conventional Wisdom for Designing NoCs in the Context of FPGAs**. Michael Papamichael and James C. Hoe. Proc. ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February 2012. ([[http://www.ece.cmu.edu/~jhoe/distribution/2012/fpga12mp.pdf |pdf]] | [[fpga_architecture_for_computing |project]])
 +
 +    * **Automatic Pipelining from Transactional Datapath Specifications**. E. Nurvitadhi, J. C. Hoe, T. Kam, S. L. Lu.  IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, Volume 30, Number 3,March 2011. ([[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=5715612 |ieee]] | [[pipeline_synthesis_from_transaction-based_specifications |project]])
 +    * **CoRAM: An In-Fabric Memory Architecture for FPGA-based Computing**. Eric S. Chung, James C. Hoe, and Kenneth Mai.  Proc. ACM International Symposium on Field-Programmable Gate Arrays (FPGA), pp 97~106, February 2011. ([[http://www.ece.cmu.edu/~jhoe/distribution/2011/fpga11.pdf |pdf]] | [[fpga_architecture_for_computing |project]])
 +    * **ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs**. E. S. Chung, M. K. Papamichael, E. Nurvitadhi, J. C. Hoe, B. Falsafi and K. Mai. ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 2, Issue 2, June 2009. ([[http://portal.acm.org/citation.cfm?id=1534916.1534925 |acm]] | [[fpga_prototyping_and_emulation_of_computer_systems |project]])
 +    * **Permuting Streaming Data Using RAMs**. M. Pueschel, P. A. Milder and J. C. Hoe. Journal of the ACM (JACM), Volume 56, Issue 2, April 2009. ([[http://portal.acm.org/citation.cfm?id=1502793.1502799 |acm]] | [[digital_signal_processing_hardware |project]])
 +    * **Reunion: Complexity-Effective Multicore Redundancy**. J. C. Smolens, B. T. Gold, B. Falsafi, and J. C. Hoe. International Symposium on Microarchitecture (MICRO), December  2006.([[http://www.ece.cmu.edu/~jhoe/distribution/2006/micro06.pdf |pdf]] | [[reliable_processors_and_systems |project]])
 +  * **Statistical Sampling of Microarchitecture Simulation**. Roland E. Wunderlich, Thomas F. Wenisch, Babak Falsafi, and James C. Hoe. ACM Transactions on Modeling and Computer Simulation, Volume 16, Number 3, June 2006. ([[http://dl.acm.org/citation.cfm?id=1147225&dl=ACM&coll=DL&CFID=512018042&CFTOKEN=86284265 |acm]] | [[smarts_simulation_sampling |project]])
 +  * **Fingerprinting: Bounding Soft-Error Detection Latency and Bandwidth**. J. C. Smolens, B. T. Gold, J. Kim, B. Falsafi, J. C. Hoe, and A. G. Nowatzyk. International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October 2004. ([[http://www.ece.cmu.edu/~jhoe/distribution/2004/asplos04.pdf |pdf]] | [[reliable_processors_and_systems |project]])
 +  * **Operation-Centric Hardware Description and Synthesis**. James C. Hoe and Arvind. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Volume 23, Issue 9, September 2004. ([[http://ieeexplore.ieee.org/iel5/43/29363/01327669.pdf?tp=&arnumber=1327669&isnumber=29363&arSt=1277&ared=1288&arAuthor=Hoe%2C+J.C.%3B++Arvind%3Bs |ieee]] | [[operation_centric_hardware_abstraction |project]])
 +  *  **A Personal Supercomputer for Climate Research**. James C. Hoe, Chris Hill and Alistair Adcroft.  Supercomputing Conference (SC), November 1999. ([[http://www.ece.cmu.edu/~jhoe/distribution/mit/csgmemo/memo-425.pdf |pdf]] | [[cluster_computing |project]])
 +  * **Network Interface for Message Passing Parallel Computation on a Workstation Cluster**. James C. Hoe. Hot Interconnects II, August 1994. ([[http://www.ece.cmu.edu/~jhoe/distribution/mit/hotint94.pdf|pdf]] | [[cluster_computing |project]])
===== Past Projects ===== ===== Past Projects =====