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| + | ====== Operation Centric Hardware Abstraction ====== | ||
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| + | This research investigates a high-level hardware design framework that supports a new hardware design abstraction that is fundamentally different from RTL. This framework is based on an operation-centric abstraction for hardware description. In an operation-centric description, | ||
| + | and described as a collection of atomic operations. | ||
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| + | * **Operation-Centric Hardware Description and Synthesis**. James C. Hoe and Arvind. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Volume 23, Issue 9, September 2004. ([[http:// | ||
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| + | * **Synchronous Extensions to Operation-Centric Hardware Description Languages**. Grace Nordin and James C. Hoe. International Conference on Formal Methods and Models for Codesign (MEMOCODE), June 2004. ([[http:// | ||
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| + | * **Synthesis of Operation-Centric Hardware Descriptions**. James C. Hoe and Arvind. | ||
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| + | * **Operation-Centric Hardware Description and Synthesis**. James C. Hoe. PhD Thesis, June 2000. ([[http:// | ||
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| + | * **Hardware Synthesis from Term Rewriting Systems**. James C. Hoe and Arvind. | ||
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| + | * **An Exercise in High-Level Architectural Description using a Synthesizable Subset of Term Rewriting Systems**. James C. Hoe, Martin Rinard and Arvind. MIT-CSGMEMO-403, | ||
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