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digital_signal_processing_hardware [2012/11/24 08:16] jhoe |
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| ====== Digital Signal Processing Hardware ====== | ====== Digital Signal Processing Hardware ====== | ||
| - | This research develops a domain-specific hardware synthesis framework for digital signal processing (DSP) computations. By incorporating domain-specific knowledge of mathematics and algebra into a synthesis tool, the proposed framework can manipulate a math-level transform description to optimize a DSP transform implementation at the algorithmic and architectural design level. This research is a part of the [[http://www.spiral.net | SPIRAL]] project. This research is in part supported by NSF through an ITR Award and by DARPA through the DESA program. | + | This research develops a domain-specific hardware synthesis framework for digital signal processing (DSP) computations. By incorporating domain-specific knowledge of mathematics and algebra into a synthesis tool, the proposed framework can manipulate a math-level transform description to optimize a DSP transform implementation at the algorithmic and architectural design level. This research is affiliated with the [[http://www.spiral.net | SPIRAL]] project. This research is supported by Intel ISTC and the DARPA PERFECT program. This research has been supported in the past in part by NSF through an ITR Award, the DARPA DESA program and C2S2 FCRP. |
| * **Students** | * **Students** | ||
