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digital_signal_processing_hardware [2019/03/31 14:36] editdigital_signal_processing_hardware [2021/11/22 03:20] (current) edit
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   * **Students**   * **Students**
-    * Berkin Akin ([[http://www.ece.cmu.edu/~jhoe/distribution/2015/akin.pdf |PhD Thesis]]) +    * Berkin Akin ([[https://users.ece.cmu.edu/~jhoe/distribution/2015/akin.pdf |PhD Thesis]]) 
     * Robert J. Koutsoyannis (MS'2012)     * Robert J. Koutsoyannis (MS'2012)
-    * [[http://www.ece.stonybrook.edu/~pmilder |Peter Milder]] ([[http://www.ece.cmu.edu/~jhoe/distribution/2010/milder.pdf |PhD Thesis]])  +    * [[http://www.ece.stonybrook.edu/~pmilder |Peter Milder]] ([[https://users.ece.cmu.edu/~jhoe/distribution/2010/milder.pdf |PhD Thesis]])  
-    * [[http://amp.ece.cmu.edu/people/weiyu/ |Wei Yu]] ([[http://www.ece.cmu.edu/~jhoe/distribution/2011/yu.pdf |PhD Thesis]])+    * [[http://amp.ece.cmu.edu/people/weiyu/ |Wei Yu]] ([[https://users.ece.cmu.edu/~jhoe/distribution/2011/yu.pdf |PhD Thesis]])
     * Guanglin Xu      * Guanglin Xu 
   * **[[http://www.spiral.net/hardware/dftgen.html| DFT IP Generator Website]]**   * **[[http://www.spiral.net/hardware/dftgen.html| DFT IP Generator Website]]**
   * **[[http://www.spiralgen.com | SpiralGen, Inc]]**   * **[[http://www.spiralgen.com | SpiralGen, Inc]]**
   * **Efficient Memory Accesses**   * **Efficient Memory Accesses**
-    * Fazle Sadi, Joe Sweeney, Scott McMillan, Tze Meng Low, James C. Hoe, Larry Pileggi, Franz Franchetti. **PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV**. IEEE High Performance Extreme Computing Conference (HPEC), September 2018. ([[http://www.ece.cmu.edu/~jhoe/distribution/2018/hpec18.pdf |pdf]])+    * Fazle Sadi, Joseph Sweeney, Tze Meng Low, James C. Hoe, Larry Pileggi, and Franz Franchetti. **Efficient SpMV Operation for Large and Highly Sparse Matrices Using Scalable Multi-Way Merge Parallelization.** Proc. ACM/IEEE International Symposium on Microarchitecture (MICRO), November 2019. ([[https://users.ece.cmu.edu/~jhoe/distribution/2019/micro2019.pdf |pdf]]) 
 +    * Franz Franchetti, Tze Meng Low, Doru Thom Popovici, Richard M. Veras, Daniele G. Spampinato, Jeremy R. Johnson, Markus Pueschel, James C. Hoe, and J. M. F. Moura. **SPIRAL: Extreme Performance Portability**. Proceedings of the IEEE, Special Issue on From High Level Specification to High Performance Code, November 2018.  ([[https://ieeexplore.ieee.org/document/8510983 |ieee]]) 
 +    * Fazle Sadi, Joe Sweeney, Scott McMillan, Tze Meng Low, James C. Hoe, Larry Pileggi, Franz Franchetti. **PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV**. IEEE High Performance Extreme Computing Conference (HPEC), September 2018. ([[https://users.ece.cmu.edu/~jhoe/distribution/2018/hpec18.pdf |pdf]])
     * Berkin Akin, Franz Franchetti, James C. Hoe. **HAMLeT Architecture for Parallel Data Reorganization in Memory**. IEEE Micro Near-Data Processing Special Issue, Jan/Feb 2016 ([[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7325181 |ieee]])      * Berkin Akin, Franz Franchetti, James C. Hoe. **HAMLeT Architecture for Parallel Data Reorganization in Memory**. IEEE Micro Near-Data Processing Special Issue, Jan/Feb 2016 ([[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7325181 |ieee]]) 
-    * Qi Guo, Tze Men Low, Nikos Alachiotis, Berkin Akin, Larry Pileggi, James C. Hoe, Franz Franchetti. **Enabling Portable Energy Efficiency with Memory Accelerated Library**. Proc. ACM/IEEE International Symposium on Microarchitecture (MICRO), December 2015. ([[http://www.ece.cmu.edu/~jhoe/distribution/2015/micro15.pdf |pdf]]) +    * Qi Guo, Tze Men Low, Nikos Alachiotis, Berkin Akin, Larry Pileggi, James C. Hoe, Franz Franchetti. **Enabling Portable Energy Efficiency with Memory Accelerated Library**. Proc. ACM/IEEE International Symposium on Microarchitecture (MICRO), December 2015. ([[https://users.ece.cmu.edu/~jhoe/distribution/2015/micro15.pdf |pdf]]) 
-    * Berkin Akin. **A Formal Approach to Memory Access Optimization: Data Layout, Reorganization, and Near-Data Processing.** PhD Thesis, August 2015 ([[http://www.ece.cmu.edu/~jhoe/distribution/2015/akin.pdf |pdf]])+    * Berkin Akin. **A Formal Approach to Memory Access Optimization: Data Layout, Reorganization, and Near-Data Processing.** PhD Thesis, August 2015 ([[https://users.ece.cmu.edu/~jhoe/distribution/2015/akin.pdf |pdf]])
     * Berkin Akin, Franz Franchetti, James C. Hoe. **FFTs with Near-Optimal Memory Access Through Block Data Layouts: Algorithm, Architecture and Design Automation**. Journal of Signal Processing Systems, June 2015. ([[http://link.springer.com/article/10.1007/s11265-015-1018-0# |springer]])     * Berkin Akin, Franz Franchetti, James C. Hoe. **FFTs with Near-Optimal Memory Access Through Block Data Layouts: Algorithm, Architecture and Design Automation**. Journal of Signal Processing Systems, June 2015. ([[http://link.springer.com/article/10.1007/s11265-015-1018-0# |springer]])
-    * Berkin Akin, Franz Franchetti, James C. Hoe. **Data reorganization in memory using 3D-stacked DRAM**. Proc. International Symposium on Computer Architecture (ISCA), June 2015. ([[http://www.ece.cmu.edu/~jhoe/distribution/2015/isca15.pdf |pdf]]) +    * Berkin Akin, Franz Franchetti, James C. Hoe. **Data reorganization in memory using 3D-stacked DRAM**. Proc. International Symposium on Computer Architecture (ISCA), June 2015. ([[https://users.ece.cmu.edu/~jhoe/distribution/2015/isca15.pdf |pdf]]) 
-    * Fazle Sadi, Berkin Akin, Doru Popovici, James C. Hoe, Larry Pileggi, and Franz Franchetti. **Algorithm/Hardware Co-optimized SAR Image Reconstruction with 3D-stacked Logic in Memory**. Proc. High Performance Extreme Computing Conference (HPEC), September 2014. ([[http://www.ece.cmu.edu/~jhoe/distribution/2014/hpec14b.pdf |pdf]]) +    * Fazle Sadi, Berkin Akin, Doru Popovici, James C. Hoe, Larry Pileggi, and Franz Franchetti. **Algorithm/Hardware Co-optimized SAR Image Reconstruction with 3D-stacked Logic in Memory**. Proc. High Performance Extreme Computing Conference (HPEC), September 2014. ([[https://users.ece.cmu.edu/~jhoe/distribution/2014/hpec14b.pdf |pdf]]) 
-    * Berkin Akin, James C. Hoe, and Franz Franchetti. **HAMLeT: Hardware Accelerated Memory Layout Transform within 3D-stacked DRAM**. Proc. High Performance Extreme Computing Conference (HPEC), September 2014. ([[http://www.ece.cmu.edu/~jhoe/distribution/2014/hpec14a.pdf |pdf]]) +    * Berkin Akin, James C. Hoe, and Franz Franchetti. **HAMLeT: Hardware Accelerated Memory Layout Transform within 3D-stacked DRAM**. Proc. High Performance Extreme Computing Conference (HPEC), September 2014. ([[https://users.ece.cmu.edu/~jhoe/distribution/2014/hpec14a.pdf |pdf]]) 
-    * Berkin Akin, Franz Franchetti, and James C. Hoe. **Understanding the Design Space of DRAM-Optimized Hardware FFT Accelerators**. Proc. International Conference on Application-specific Systems, Architectures and Processors (ASAP), June 2014. ([[http://www.ece.cmu.edu/~jhoe/distribution/2014/asap14.pdf |pdf]]) +    * Berkin Akin, Franz Franchetti, and James C. Hoe. **Understanding the Design Space of DRAM-Optimized Hardware FFT Accelerators**. Proc. International Conference on Application-specific Systems, Architectures and Processors (ASAP), June 2014. ([[https://users.ece.cmu.edu/~jhoe/distribution/2014/asap14.pdf |pdf]]) 
-    * Berkin Akin, Franz Franchetti, and James C. Hoe. **FFTs with Near-Optimal Memory Access Through Block Data Layouts**. Proc. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), May 2014. ([[http://www.ece.cmu.edu/~jhoe/distribution/2014/icassp14.pdf |pdf]]) +    * Berkin Akin, Franz Franchetti, and James C. Hoe. **FFTs with Near-Optimal Memory Access Through Block Data Layouts**. Proc. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), May 2014. ([[https://users.ece.cmu.edu/~jhoe/distribution/2014/icassp14.pdf |pdf]]) 
-    * Q. Zhu, B. Akin, H.E. Sumbul, F. Sadi, J.C. Hoe, L. Pileggi, F. Franchetti.  **A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing**. Proc. International 3D Systems Integration Conference (3DIC), October 2013. ([[http://www.ece.cmu.edu/~jhoe/distribution/2013/3dic13.pdf |pdf]]) +    * Q. Zhu, B. Akin, H.E. Sumbul, F. Sadi, J.C. Hoe, L. Pileggi, F. Franchetti.  **A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing**. Proc. International 3D Systems Integration Conference (3DIC), October 2013. ([[https://users.ece.cmu.edu/~jhoe/distribution/2013/3dic13.pdf |pdf]]) 
-    * Berkin Akin, Peter A. Milder, Franz Franchetti and James C. Hoe. **Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes.** Proc. International Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2012. ([[http://www.ece.cmu.edu/~jhoe/distribution/2012/fccm12.pdf |pdf]])+    * Berkin Akin, Peter A. Milder, Franz Franchetti and James C. Hoe. **Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes.** Proc. International Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2012. ([[https://users.ece.cmu.edu/~jhoe/distribution/2012/fccm12.pdf |pdf]])
  
   * **Linear Transform Kernels**   * **Linear Transform Kernels**
     * **Computer Generation of Hardware for Digital Signal Processing Transforms**. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel.  ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 17 Issue 2, April 2012.  ([[http://portal.acm.org/citation.cfm?id=2159547 |acm]])     * **Computer Generation of Hardware for Digital Signal Processing Transforms**. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel.  ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 17 Issue 2, April 2012.  ([[http://portal.acm.org/citation.cfm?id=2159547 |acm]])
-    * **A Mathematical Approach for Compiling and Optimizing Hardware Implementations of DSP Transforms.** Peter A. Milder. PhD Thesis, August 2011 ([[http://www.ece.cmu.edu/~jhoe/distribution/2010/milder.pdf |pdf]]) +    * **A Mathematical Approach for Compiling and Optimizing Hardware Implementations of DSP Transforms.** Peter A. Milder. PhD Thesis, August 2011 ([[https://users.ece.cmu.edu/~jhoe/distribution/2010/milder.pdf |pdf]]) 
-    * **Hardware Implementation of the Discrete Fourier Transform with Non-Power-of-Two Problem Size**. P. Milder, F. Franchetti, J. C. Hoe, and M. Pueschel. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), March 2010. ([[http://www.ece.cmu.edu/~jhoe/distribution/2010/icassp10.pdf |pdf]]) +    * **Hardware Implementation of the Discrete Fourier Transform with Non-Power-of-Two Problem Size**. P. Milder, F. Franchetti, J. C. Hoe, and M. Pueschel. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), March 2010. ([[https://users.ece.cmu.edu/~jhoe/distribution/2010/icassp10.pdf |pdf]]) 
-    * **Automatic Generation of Streaming Datapaths for Arbitrary Fixed Permutations**. P. A. Milder, J. C. Hoe and M. Pueschel.  Design, Automation and Test in Europe (DATE), April 2009. ([[http://www.ece.cmu.edu/~jhoe/distribution/2009/date09.pdf |pdf]])+    * **Automatic Generation of Streaming Datapaths for Arbitrary Fixed Permutations**. P. A. Milder, J. C. Hoe and M. Pueschel.  Design, Automation and Test in Europe (DATE), April 2009. ([[https://users.ece.cmu.edu/~jhoe/distribution/2009/date09.pdf |pdf]])
     * **Permuting Streaming Data Using RAMs**. M. Pueschel, P. A. Milder and J. C. Hoe. Journal of the ACM (JACM), Volume 56 , Issue 2, April 2009. ([[http://portal.acm.org/citation.cfm?id=1502793.1502799 |acm]])     * **Permuting Streaming Data Using RAMs**. M. Pueschel, P. A. Milder and J. C. Hoe. Journal of the ACM (JACM), Volume 56 , Issue 2, April 2009. ([[http://portal.acm.org/citation.cfm?id=1502793.1502799 |acm]])
-    * **Formal Datapath Representation and Manipulation for Implementing DSP Transforms**. P. A. Milder, F. Franchetti, J. C. Hoe, M. Pueschel. Design Automation Conference (DAC), June 2008. ([[http://www.ece.cmu.edu/~jhoe/distribution/2008/dac08.pdf |pdf]])+    * **Formal Datapath Representation and Manipulation for Implementing DSP Transforms**. P. A. Milder, F. Franchetti, J. C. Hoe, M. Pueschel. Design Automation Conference (DAC), June 2008. ([[https://users.ece.cmu.edu/~jhoe/distribution/2008/dac08.pdf |pdf]])
     * **Time-Multiplexed Multiple Constant Multiplication**. P. Tummeltshammer, J. C. Hoe, and M. Pueschel. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Volume 26, Number 9, September 2007. ([[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=4294045 |ieee]])     * **Time-Multiplexed Multiple Constant Multiplication**. P. Tummeltshammer, J. C. Hoe, and M. Pueschel. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Volume 26, Number 9, September 2007. ([[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=4294045 |ieee]])
-    * **Generating FPGA-Accelerated DFT Libraries**. P. D'Alberto, F. Franchetti, P. A. Milder, A. Sandryhaila, J. C. Hoe, J. Johnson, J. M. F. Moura and M. Pueschel. Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2007. ([[http://www.ece.cmu.edu/~jhoe/distribution/2007/fccm07.pdf |pdf]]) +    * **Generating FPGA-Accelerated DFT Libraries**. P. D'Alberto, F. Franchetti, P. A. Milder, A. Sandryhaila, J. C. Hoe, J. Johnson, J. M. F. Moura and M. Pueschel. Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2007. ([[https://users.ece.cmu.edu/~jhoe/distribution/2007/fccm07.pdf |pdf]]) 
-    * **Spiral: Joint Runtime and Energy Optimization of Linear Transforms**.  M. Telgarsky, J. C. Hoe, and J. Moura. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), May 2006.  ([[http://www.ece.cmu.edu/~jhoe/distribution/2006/icassp06.pdf |pdf]]) +    * **Spiral: Joint Runtime and Energy Optimization of Linear Transforms**.  M. Telgarsky, J. C. Hoe, and J. Moura. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), May 2006.  ([[https://users.ece.cmu.edu/~jhoe/distribution/2006/icassp06.pdf |pdf]]) 
-    * ** Fast and Accurate Resource Estimation of Automatically Generated Custom DFT IP Cores**.  P. Milder, M. Ahmad, J. C. Hoe, and M. Pueschel. International Symposium on Field Programmable Gate Arrays (FPGA), February 2006. ([[http://www.ece.cmu.edu/~jhoe/distribution/2006/fpga06.pdf |pdf]] and try out the tool [[http://www.spiral.net/hardware/dftgen.html | dftgen]]) +    * ** Fast and Accurate Resource Estimation of Automatically Generated Custom DFT IP Cores**.  P. Milder, M. Ahmad, J. C. Hoe, and M. Pueschel. International Symposium on Field Programmable Gate Arrays (FPGA), February 2006. ([[https://users.ece.cmu.edu/~jhoe/distribution/2006/fpga06.pdf |pdf]] and try out the tool [[http://www.spiral.net/hardware/dftgen.html | dftgen]]) 
-    * **Automatic Generation of Customized Discrete Fourier Transform IPs**. G. Nordin, P. Milder, J. C. Hoe, and M. Pueschel. Design Automation Conference (DAC), June 2005. ([[http://www.ece.cmu.edu/~jhoe/distribution/2005/dac05.pdf |pdf]] and try out the tool [[http://www.spiral.net/hardware/dftgen.html | dftgen]]) +    * **Automatic Generation of Customized Discrete Fourier Transform IPs**. G. Nordin, P. Milder, J. C. Hoe, and M. Pueschel. Design Automation Conference (DAC), June 2005. ([[https://users.ece.cmu.edu/~jhoe/distribution/2005/dac05.pdf |pdf]] and try out the tool [[http://www.spiral.net/hardware/dftgen.html | dftgen]]) 
-    * **Custom Optimized Multiplierless Implementations of DSP Algorithms**. M. Pueschel, A. Zelinski, and J. C. Hoe. International Conference on Computer Aided Design (ICCAD), November 2004. ([[http://www.ece.cmu.edu/~jhoe/distribution/2004/iccad04.pdf |pdf]]) +    * **Custom Optimized Multiplierless Implementations of DSP Algorithms**. M. Pueschel, A. Zelinski, and J. C. Hoe. International Conference on Computer Aided Design (ICCAD), November 2004. ([[https://users.ece.cmu.edu/~jhoe/distribution/2004/iccad04.pdf |pdf]]) 
-    * **Multiple Constant Multiplication by Time Multiplexed Mapping of Addition Chains**. P. Tummeltshammer, J. C. Hoe, and M. Pueschel.  Design Automation Conference (DAC), June 2004. ([[http://www.ece.cmu.edu/~jhoe/distribution/2004/dac04.pdf |pdf]]) +    * **Multiple Constant Multiplication by Time Multiplexed Mapping of Addition Chains**. P. Tummeltshammer, J. C. Hoe, and M. Pueschel.  Design Automation Conference (DAC), June 2004. ([[https://users.ece.cmu.edu/~jhoe/distribution/2004/dac04.pdf |pdf]]) 
-    * **Automatic Cost Minimization for Multiplierless Implementations of Discrete Signal Transforms**. A. Zelinski, M. Pueschel, S. Misra, and J. C. Hoe. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), May 2004. ([[http://www.ece.cmu.edu/~jhoe/distribution/2004/icassp04.pdf |pdf]])+    * **Automatic Cost Minimization for Multiplierless Implementations of Discrete Signal Transforms**. A. Zelinski, M. Pueschel, S. Misra, and J. C. Hoe. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), May 2004. ([[https://users.ece.cmu.edu/~jhoe/distribution/2004/icassp04.pdf |pdf]])
   * **OFDM**   * **OFDM**
     * **Improving Fixed-Point Accuracy of FFT cores in O-OFDM Systems**. Robert Koutsoyannis, Peter A. Milder, Christian Berger, Madeleine Glick, James C. Hoe, and Markus Pueschel. Proc. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), March 2012.     * **Improving Fixed-Point Accuracy of FFT cores in O-OFDM Systems**. Robert Koutsoyannis, Peter A. Milder, Christian Berger, Madeleine Glick, James C. Hoe, and Markus Pueschel. Proc. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), March 2012.
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     * **21.4 GS/s Real-Time DSP-Based Optical OFDM Signal Generation and Transmission Over 1600 km of Uncompensated Fibre**. Y. Benlachtar, P. M. Watts, R. Bouziane, P. Milder, R. Koutsoyannis, J. C. Hoe, M. Püschel, M. Glick and R. I. Killey. European Conference and Exhibition on Optical Communication Conference, September 2009. (Post Deadline Session)     * **21.4 GS/s Real-Time DSP-Based Optical OFDM Signal Generation and Transmission Over 1600 km of Uncompensated Fibre**. Y. Benlachtar, P. M. Watts, R. Bouziane, P. Milder, R. Koutsoyannis, J. C. Hoe, M. Püschel, M. Glick and R. I. Killey. European Conference and Exhibition on Optical Communication Conference, September 2009. (Post Deadline Session)
   * **Image Processing**     * **Image Processing**  
-    * **Highly Efficient Performance Portable Tracking of Evolving Surfaces**. Wei Yu, Franz Franchetti, and James C. Hoe. Proc. International Parallel and Distributed Processing Symposium (IPDPS), May 2012. ([[http://www.ece.cmu.edu/~jhoe/distribution/2012/ipdps12.pdf |pdf]]) +    * **Highly Efficient Performance Portable Tracking of Evolving Surfaces**. Wei Yu, Franz Franchetti, and James C. Hoe. Proc. International Parallel and Distributed Processing Symposium (IPDPS), May 2012. ([[https://users.ece.cmu.edu/~jhoe/distribution/2012/ipdps12.pdf |pdf]]) 
-    * **Performance Portable Tracking of Evolving Surfaces.** Wei Yu. PhD Thesis, May 2011 ([[http://www.ece.cmu.edu/~jhoe/distribution/2011/yu.pdf |pdf]])+    * **Performance Portable Tracking of Evolving Surfaces.** Wei Yu. PhD Thesis, May 2011 ([[https://users.ece.cmu.edu/~jhoe/distribution/2011/yu.pdf |pdf]])
     * **High Performance Stereo Vision Designed for Massively Data Parallel Platforms**. W. Yu, T. Chen, F. Franchetti, and J. C. Hoe.   IEEE Transactions on Circuits and Systems for Video Technology, Volume 20, Number 11, November 2010. ([[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=5585736 |ieee]])     * **High Performance Stereo Vision Designed for Massively Data Parallel Platforms**. W. Yu, T. Chen, F. Franchetti, and J. C. Hoe.   IEEE Transactions on Circuits and Systems for Video Technology, Volume 20, Number 11, November 2010. ([[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=5585736 |ieee]])
-    * **Fast Bilateral Filtering by Adapting Block Size**. W. Yu, F. Franchetti, J. C. Hoe, Y.-J. Chang, T. Chen. Proc. International Conference on Image Processing (ICIP), September 2010. ([[http://www.ece.cmu.edu/~jhoe/distribution/2010/icip10.pdf |pdf]]) +    * **Fast Bilateral Filtering by Adapting Block Size**. W. Yu, F. Franchetti, J. C. Hoe, Y.-J. Chang, T. Chen. Proc. International Conference on Image Processing (ICIP), September 2010. ([[https://users.ece.cmu.edu/~jhoe/distribution/2010/icip10.pdf |pdf]]) 
-    * **Real Time Stereo Vision Using Exponential Step Cost Aggregation on GPU**. W. Yu, T. Chen, J. C. Hoe. International Conference on Image Processing (ICIP), November 2009. ([[http://www.ece.cmu.edu/~jhoe/distribution/2009/icip09.pdf |pdf]])+    * **Real Time Stereo Vision Using Exponential Step Cost Aggregation on GPU**. W. Yu, T. Chen, J. C. Hoe. International Conference on Image Processing (ICIP), November 2009. ([[https://users.ece.cmu.edu/~jhoe/distribution/2009/icip09.pdf |pdf]]) 
 + 
 +=====Related===== 
 +    * [[18-643 Reconfigurable Logic |ECE 18-643: Reconfigurable Logic - Technology, Architecture and Applications]] 
 +    * [[FPGA Architecture for Computing]]