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digital_signal_processing_hardware [2019/03/31 14:35] – edit | digital_signal_processing_hardware [2019/09/30 09:46] – edit | ||
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* **[[http:// | * **[[http:// | ||
* **Efficient Memory Accesses** | * **Efficient Memory Accesses** | ||
- | * Fazle Sadi, Joe Sweeney, Scott McMillan, Tze Meng Low, James C. Hoe, Larry Pileggi, Franz Franchetti. **PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV**. IEEE High Performance | + | * Fazle Sadi, Joe Sweeney, Scott McMillan, Tze Meng Low, James C. Hoe, Larry Pileggi, Franz Franchetti. **PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV**. IEEE High Performance |
* Berkin Akin, Franz Franchetti, James C. Hoe. **HAMLeT Architecture for Parallel Data Reorganization in Memory**. IEEE Micro Near-Data Processing Special Issue, Jan/Feb 2016 ([[http:// | * Berkin Akin, Franz Franchetti, James C. Hoe. **HAMLeT Architecture for Parallel Data Reorganization in Memory**. IEEE Micro Near-Data Processing Special Issue, Jan/Feb 2016 ([[http:// | ||
* Qi Guo, Tze Men Low, Nikos Alachiotis, Berkin Akin, Larry Pileggi, James C. Hoe, Franz Franchetti. **Enabling Portable Energy Efficiency with Memory Accelerated Library**. Proc. ACM/IEEE International Symposium on Microarchitecture (MICRO), December 2015. ([[http:// | * Qi Guo, Tze Men Low, Nikos Alachiotis, Berkin Akin, Larry Pileggi, James C. Hoe, Franz Franchetti. **Enabling Portable Energy Efficiency with Memory Accelerated Library**. Proc. ACM/IEEE International Symposium on Microarchitecture (MICRO), December 2015. ([[http:// | ||
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* **Fast Bilateral Filtering by Adapting Block Size**. W. Yu, F. Franchetti, J. C. Hoe, Y.-J. Chang, T. Chen. Proc. International Conference on Image Processing (ICIP), September 2010. ([[http:// | * **Fast Bilateral Filtering by Adapting Block Size**. W. Yu, F. Franchetti, J. C. Hoe, Y.-J. Chang, T. Chen. Proc. International Conference on Image Processing (ICIP), September 2010. ([[http:// | ||
* **Real Time Stereo Vision Using Exponential Step Cost Aggregation on GPU**. W. Yu, T. Chen, J. C. Hoe. International Conference on Image Processing (ICIP), November 2009. ([[http:// | * **Real Time Stereo Vision Using Exponential Step Cost Aggregation on GPU**. W. Yu, T. Chen, J. C. Hoe. International Conference on Image Processing (ICIP), November 2009. ([[http:// | ||
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+ | =====Related===== | ||
+ | * [[18-643 Reconfigurable Logic |ECE 18-643: Reconfigurable Logic - Technology, Architecture and Applications]] | ||
+ | * [[FPGA Architecture for Computing]] | ||
+ |