Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revisionPrevious revision
Next revision
Previous revision
Next revisionBoth sides next revision
digital_signal_processing_hardware [2019/03/31 14:35] editdigital_signal_processing_hardware [2019/09/30 09:46] edit
Line 12: Line 12:
   * **[[http://www.spiralgen.com | SpiralGen, Inc]]**   * **[[http://www.spiralgen.com | SpiralGen, Inc]]**
   * **Efficient Memory Accesses**   * **Efficient Memory Accesses**
-    * Fazle Sadi, Joe Sweeney, Scott McMillan, Tze Meng Low, James C. Hoe, Larry Pileggi, Franz Franchetti. **PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV**. IEEE High Performance extreme Computing Conference (HPEC), September 2018. ([[http://www.ece.cmu.edu/~jhoe/distribution/2018/hpec18.pdf |pdf]])+    * Fazle Sadi, Joe Sweeney, Scott McMillan, Tze Meng Low, James C. Hoe, Larry Pileggi, Franz Franchetti. **PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV**. IEEE High Performance Extreme Computing Conference (HPEC), September 2018. ([[http://www.ece.cmu.edu/~jhoe/distribution/2018/hpec18.pdf |pdf]])
     * Berkin Akin, Franz Franchetti, James C. Hoe. **HAMLeT Architecture for Parallel Data Reorganization in Memory**. IEEE Micro Near-Data Processing Special Issue, Jan/Feb 2016 ([[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7325181 |ieee]])      * Berkin Akin, Franz Franchetti, James C. Hoe. **HAMLeT Architecture for Parallel Data Reorganization in Memory**. IEEE Micro Near-Data Processing Special Issue, Jan/Feb 2016 ([[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7325181 |ieee]]) 
     * Qi Guo, Tze Men Low, Nikos Alachiotis, Berkin Akin, Larry Pileggi, James C. Hoe, Franz Franchetti. **Enabling Portable Energy Efficiency with Memory Accelerated Library**. Proc. ACM/IEEE International Symposium on Microarchitecture (MICRO), December 2015. ([[http://www.ece.cmu.edu/~jhoe/distribution/2015/micro15.pdf |pdf]])     * Qi Guo, Tze Men Low, Nikos Alachiotis, Berkin Akin, Larry Pileggi, James C. Hoe, Franz Franchetti. **Enabling Portable Energy Efficiency with Memory Accelerated Library**. Proc. ACM/IEEE International Symposium on Microarchitecture (MICRO), December 2015. ([[http://www.ece.cmu.edu/~jhoe/distribution/2015/micro15.pdf |pdf]])
Line 57: Line 57:
     * **Fast Bilateral Filtering by Adapting Block Size**. W. Yu, F. Franchetti, J. C. Hoe, Y.-J. Chang, T. Chen. Proc. International Conference on Image Processing (ICIP), September 2010. ([[http://www.ece.cmu.edu/~jhoe/distribution/2010/icip10.pdf |pdf]])     * **Fast Bilateral Filtering by Adapting Block Size**. W. Yu, F. Franchetti, J. C. Hoe, Y.-J. Chang, T. Chen. Proc. International Conference on Image Processing (ICIP), September 2010. ([[http://www.ece.cmu.edu/~jhoe/distribution/2010/icip10.pdf |pdf]])
     * **Real Time Stereo Vision Using Exponential Step Cost Aggregation on GPU**. W. Yu, T. Chen, J. C. Hoe. International Conference on Image Processing (ICIP), November 2009. ([[http://www.ece.cmu.edu/~jhoe/distribution/2009/icip09.pdf |pdf]])     * **Real Time Stereo Vision Using Exponential Step Cost Aggregation on GPU**. W. Yu, T. Chen, J. C. Hoe. International Conference on Image Processing (ICIP), November 2009. ([[http://www.ece.cmu.edu/~jhoe/distribution/2009/icip09.pdf |pdf]])
 +
 +=====Related=====
 +    * [[18-643 Reconfigurable Logic |ECE 18-643: Reconfigurable Logic - Technology, Architecture and Applications]]
 +    * [[FPGA Architecture for Computing]]
 +