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18-643_reconfigurable_logic [2021/08/27 02:57] – [Announcements] edit18-643_reconfigurable_logic [2024/03/25 20:28] (current) – edit
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 ====== 18-643 Reconfigurable Logic: Technology, Architecture and Applications ====== ====== 18-643 Reconfigurable Logic: Technology, Architecture and Applications ======
  
 +18-643 is on hiatus for Fall 2024.  Good alternatives I would take instead are
 +
 +  * 18740 Modern Computer Architecture and Design
 +  * 18645 How to Write Fast Code I
 +  * 18640 Hardware Arithmetic for Machine Learning
 +  * 15618 Parallel Computer Architecture and Programming
  
 ===== Announcements ===== ===== Announcements =====
  
 +  * [[https://www.youtube.com/watch?v=2AMKJlXHZRI |What this course is about (Youtube)]]
 +  * When the course started in 2015, "RTL" was made a required experience.  If you are skilled in high-performance parallel programming, you should do fine in the current course.  (If you need an RTL refresher, go to [[http://hdlbits.01xz.net |HDLBits]]).
 +  * **Recitation attendance is optional.** Recitation provides supplemental help on labs and projects.  We are likely to reschedule the time by a popularity vote come fall.
   * No recitation first two weeks of school   * No recitation first two weeks of school
-  * Recitation attendance optional. Recitation provides supplemental help on labs and projects. +  * After the semester starts, students on waitlist should email the instructor to get temporary access to Canvas.
-  * **Students on waitlist should email the instructor. (This is important as [[https://docs.google.com/document/d/1EdV-76ZLJFnekiRVUVAX6Fi3y2IgnuKnq1V17ARMRUU/edit |Lab 0]] starts on day 1 and is due on 9/13 noon.  Due to Covid, we have to observe headcount max in the classroom.  Waitlisted students cannot be present unless there is enough seats. I will record and post lectures for the first 2 weeks for waitlisted students until attendance is finalized.)** +
  
 ===== Quick Links ===== ===== Quick Links =====
  
-  * [[18-643 Course Schedule, Fall 2021 | Fall 2021 Lecture Schedule and Notes]] +  * [[18-643 Course Schedule, Fall 2023 | Fall 2023 Lecture Schedule and Notes]] 
-  * Preview lecture notes from [[18-643 Course Schedule, Fall 2020 |the last completed semester]]+  * Preview lecture notes from [[18-643 Course Schedule, Fall 2023 |the last completed semester]]
   * Communications   * Communications
     * visit [[https://canvas.cmu.edu |Canvas]] for official announcements, handouts, work submissions, etc.     * visit [[https://canvas.cmu.edu |Canvas]] for official announcements, handouts, work submissions, etc.
-    * use [[https://piazza.com/cmu/fall2021/18643 |Piazza]] for lab-related discussions+    * use [[https://piazza.com/cmu/fall2023/18643 |Piazza]] for lab-related discussions
     * subscribe [[http://nexusfpga.org/mailman/listinfo/seminars_nexusfpga.org|seminars@nexusfpga.org]] to receive FPGA related seminars announcements (available to anyone with cmu.edu or pitt.edu address)     * subscribe [[http://nexusfpga.org/mailman/listinfo/seminars_nexusfpga.org|seminars@nexusfpga.org]] to receive FPGA related seminars announcements (available to anyone with cmu.edu or pitt.edu address)
 +  * [[https://www.ece.cmu.edu/academics/academic-services-center.html |Academic Services Center]]
  
  
 ===== Course Description ===== ===== Course Description =====
  
-Three decades since their original inception as a lower-cost compromise to ASICs, modern Field Programmable Gate Arrays (FPGAs) are versatile and powerful systems-on-a-chip for many applications that need both hardware level efficiency and the flexibility of reprogrammability. More recently, FPGAs have also emerged as a formidable computing substrate with applications ranging from data centers to mobile devices. This course offers a comprehensive coverage of modern FPGAs in terms of technology, architecture and applications. The coverage will also extend into on-going research investigations of future directions. Students will take part in a substantial design project applying the latest FPGA platforms to compute acceleration. Register-Transfer Level (RTL) hardware design experience is required.+Three decades since their original inception as a lower-cost compromise to ASICs, modern Field Programmable Gate Arrays (FPGAs) are versatile and powerful systems-on-a-chip for many applications that need both hardware level efficiency and the flexibility of reprogrammability. More recently, FPGAs have also emerged as a formidable computing substrate with applications ranging from data centers to mobile devices. This course offers a comprehensive coverage of modern FPGAs in terms of technology, architecture and applications. The coverage will also extend into on-going research investigations of future directions. Students will take part in a substantial design project applying the latest FPGA platforms to compute acceleration. <del>Register-Transfer Level (RTL) hardware design experience is required.</del>
  
 Prerequisites: 18-341 or 18-447 Prerequisites: 18-341 or 18-447
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     * [[:home |James C. Hoe]] ([[:how_to_contact_me |contact]])     * [[:home |James C. Hoe]] ([[:how_to_contact_me |contact]])
   * Teaching Assistants   * Teaching Assistants
-    * Shashank Obla +    * [[cw4@cmu.edu |Chengyue Wang]] 
 +    * [[jiajunhu@andrew.cmu.edu |Jiajun Hu]]
     * [[https://canvas.cmu.edu |See Canvas for contact info and office hours]]     * [[https://canvas.cmu.edu |See Canvas for contact info and office hours]]
 +  * [[https://www.ece.cmu.edu/academics/academic-services-center.html |Academic Services Center]]
  
 ===== Meetings ===== ===== Meetings =====
-  * Lectures: Monday and Wednesday, 1:25pm to 3:15pm, WEH 5421 +  * Lectures: Monday and Wednesday, 12:00pm to 1:50pm, SH234 
-  * Recitations: Wednesday, 4:40pm to 6:00pm, WEH 5403+  * Recitations: TBD.