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| * [[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7086413 |[Trimberger15]]] S. M. Trimberger, “Three Ages of FPGAs: A Retrospective on the First Thirty Years of FPGA Technology,” Proceedings of the IEEE, March 2015. | * [[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7086413 |[Trimberger15]]] S. M. Trimberger, “Three Ages of FPGAs: A Retrospective on the First Thirty Years of FPGA Technology,” Proceedings of the IEEE, March 2015. |
| * [[http://ieeexplore.ieee.org/document/7161556/ |[Wang15]]] K. Wang, et al., "Association Rule Mining with the Micron Automata Processor," Proceedings of IPDPS, 2015. | * [[http://ieeexplore.ieee.org/document/7161556/ |[Wang15]]] K. Wang, et al., "Association Rule Mining with the Micron Automata Processor," Proceedings of IPDPS, 2015. |
| * [[http://ieeexplore.ieee.org/document/1395531/?arnumber=1395531 |[Weisz15]]] G. Weisz, et al., "CoRAM++: Supporting data-structure-specific memory interfaces for FPGA computing," Proceedings of FPL, 2015. | * [[http://ieeexplore.ieee.org/document/7294017/ |[Weisz15]]] G. Weisz, et al., "CoRAM++: Supporting data-structure-specific memory interfaces for FPGA computing," Proceedings of FPL, 2015. |
| * [[http://dl.acm.org/citation.cfm?id=2689060 |[Zhang15]]] C. Zhang, et al., "Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks," Proceedings of FPGA, 2015. | * [[http://dl.acm.org/citation.cfm?id=2689060 |[Zhang15]]] C. Zhang, et al., "Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks," Proceedings of FPGA, 2015. |
