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18-100 Course Schedule, Spring 2012

  • Lecture
    • TR 01:30PM 02:50PM DH 2315
  • Recitatations
    • M 11:30AM 12:20PM PH A22
    • M 12:30PM 01:20PM GHC 4102
    • M 02:30PM 03:20PM WEH 5312
  • Labs
    • W 06:30PM 09:20PM HH A101
    • R 06:30PM 09:20PM HH A101
    • F 01:30PM 04:20PM HH A101


Week Date L# Topic
1 1/17 L1 Introduction, discussion of engineering systems and sub-systems, basic electricity
1/19 L2 Voltage, current, resistance, power, circuit schematic symbols, ground
2 1/24 L3 Power dissipation, Ohm's law, Kirchoff's Voltage and Current Laws, basic circuits
1/26 L4 Series and parallel resistances and combinations, solving circuits using equivalent resistances
3 1/31 L5 Superposition, Thevenin and Norton Equivalents, Source Transformation
2/2 L6 Introduction to capacitors and inductors, impedance, begin 1st order systems
4 2/7 L7 Continue 1st order systems, RC and LR circuits, time and freq. domain
2/9 L8 2nd order systems, LRC circuits, frequency response
5 2/14 L9 Introduction to Operational Amplifiers, open and closed loop gain, op-amp assumptions, inverting and non-inverting amplifier circuits
2/16 L10 Review for Exam I
6 2/21 Exam I
2/23 L11 Buffers, summing and difference circuits, active filters
7 2/28 L12 Introduction to diodes (signal, zener, and LED), basic diode operation, piecewise linear model (PWL) for diodes, rectifiers
3/1 L13 Introduction to transistors, basic transistor operation, piecewise linear model for NPN transistors, common emitter circuits
8 3/6 L14 Common collector transistor circuit and circuits with emitter and collector resistors
3/8 L15 transistors wrap up
Spring Break
9 3/20 L16 Small signal analysis of transistor circuits, amplifiers
3/22 L17 Signals and modulation
10 3/27 L18 Sampling, analog to digital conversion, quantization, base conversions, binary arithmetic
3/29 L19 Introduction to Computer Systems, begin basic assembly language
11 4/3 Exam II
4/5 L20 Basic assembly language (cont.)
12 4/10 L21 Logic gates, Boolean expressions, DeMorgan's theorems, begin combinational logic circuits
4/12 L22 Combinational logic circuits (cont.), truth tables, digital circuit schematics, two-level circuit representation
13 4/17 L23 Karnaugh maps, adders, multiplexers, de-multiplexers
4/19 No class, Spring Carnival
14 4/24 L24 Feedback in logic circuits, SR flip-flops, D flip-flops, master-slave edge-triggered flip-flops, sequential logic, state diagrams, state transition tables, begin finite state machine design
4/26 L25 Continue finite state machine design, design of counters, output mapping, sequential logic circuits with external inputs
15 5/1 L26 Review for Exam III
5/3 Exam III
TBD Final Exam