18-100 Introduction to ECE Course Description
| Week | Date | L# | Topic |
|---|---|---|---|
| 1 | 8/30 | L1 | Introduction, discussion of engineering systems and sub-systems, basic electricity |
| 9/1 | L2 | Voltage, current, resistance, power, circuit schematic symbols, ground | |
| 2 | 9/6 | L3 | Power dissipation, Ohm's law, Kirchoff's Voltage and Current Laws, basic circuits |
| 9/8 | L4 | Series and parallel resistances and combinations, solving circuits using equivalent resistances | |
| 3 | 9/13 | L5 | Superposition, Thevenin and Norton Equivalents, Source Transformation |
| 9/15 | L6 | Introduction to capacitors and inductors, impedance, begin 1st order systems | |
| 4 | 9/20 | L7 | Continue 1st order systems, RC and LR circuits, time and freq. domain |
| 9/22 | L8 | 2nd order systems, LRC circuits, frequency response | |
| 5 | 9/27 | L9 | CIT Area Talks. Review for Exam I |
| 9/29 | Exam I | ||
| 6 | 10/4 | L10 | Introduction to Operational Amplifiers, open and closed loop gain, op-amp assumptions, inverting and non-inverting amplifier circuits |
| 10/6 | L11 | Buffers, summing and difference circuits, active filters | |
| 7 | 10/11 | L12 | Introduction to diodes (signal, zener, and LED), basic diode operation, piecewise linear model (PWL) for diodes, rectifiers |
| 10/13 | L13 | Introduction to transistors, basic transistor operation, piecewise linear model for NPN transistors, common emitter circuits | |
| 8 | 10/18 | L14 | Common collector transistor circuit and circuits with emitter and collector resistors |
| 10/20 | L15 | Small signal analysis of transistor circuits, amplifiers | |
| 9 | 10/25 | L16 | Signals and modulation |
| 10/27 | L17 | Sampling, analog to digital conversion, quantization, base conversions, binary arithmetic | |
| 10 | 11/1 | L18 | Introduction to Computer Systems, begin basic assembly language |
| 11/3 | Exam II | ||
| 11 | 11/8 | L19 | Basic assembly language (cont.) |
| 11/10 | L20 | Logic gates, Boolean expressions, DeMorgan's theorems, begin combinational logic circuits | |
| 12 | 11/15 | L21 | Combinational logic circuits (cont.), truth tables, digital circuit schematics, two-level circuit representation |
| 11/17 | L22 | Karnaugh maps, adders, multiplexers, de-multiplexers | |
| 13 | 11/22 | L23 | A tour of the history of computing |
| 11/24 | Thanksgiving (no class) | ||
| 14 | 11/29 | L24 | Feedback in logic circuits, SR flip-flops, D flip-flops, master-slave edge-triggered flip-flops, sequential logic, state diagrams, state transition tables, begin finite state machine design |
| 12/1 | L25 | Continue finite state machine design, design of counters, output mapping, sequential logic circuits with external inputs | |
| 15 | 12/6 | L26 | CIT Area Talks. Review for Exam III |
| 12/8 | Exam III | ||
| 12/16 | Final Exam |