Prospective Team Member Information

I currently am looking for PhD students and post docs, in particular in the higher abstraction level
range of my research interests. I will look at exceptionally well-qualified CMU undergraduate
candidates that perfectly align with my research agenda for summer internships. I have openings
for ECE MS research for candidates that align exceptionally well.

My research is very interdisciplinary and collaborative, and vertically integrates across the whole
computing stack from algorithm development down to silicon implementation. I look for students
with the following background to join my group. If you have experience and a background in three or
more of the major areas listed below, you may apply: [PhD student] [PostDoc] [research for CMU
undergraduate students].

My team has included postdocs, PhD students, and CMU (SCS/CIT) undergraduates looking for
research projects. I usually hire student researchers only over the summer. Please send me your
resume and identify the three or more areas below that you have mastery of. If you apply for a PhD
in ECE and are interested in my being your advisor, please apply [PhD student], and email me your
application number. I occasionally hire post docs. Successful candidates are interested in collaboration,
project management, and mentoring of students, and have a strong track record in multiple areas below.

If you contact me, please take the time to identify which of the skills and backgrounds I am looking for
you are having. Sorry, I am *not* looking for international visitors who try to come outside of
established channels like IAESTE and the department internship program.

Programming for performance
Very good (black belt) low‐level programming skills: C, C++, x86 assembly
Very good accelerator/parallel programming skills: OpenMP/pthreads, MPI, CUDA, OpenCL, OpenACC
Performance engineering experience: has optimized some code to make it as fast as possible

Higher level programming
Experience in functional programming (Haskell, LISP/Scheme,…)
Experience with embedded DSLs
Experience in term rewriting/pattern matching
Understanding of Lambda calculus and Hoare logic
Experience in logic programming and constraint solving
Experience in Mathematica or Maple programming

Formal Methods
Experience with proof assistants (Coq, Isabelle)
Experience with SAT and SMT
Experience with model checking

Computer architecture
Knowledge of microarchitecures of x86 across multiple generations
Knowledge of DSPs and GPU low level architectural details
Experience with optimized FPGA IP block design
Experience with SMP and SMT related architectural details
Experience with memory hierarchy architecture
Experience with architectural level and functional simulators and emulators

ASIC design
Knowledge of 3D stacking, silicon interposers, through silicon VIAs
Experience with ASIC design tool flow
Knowledge of low level DRAM details
Knowledge of SRAM and eDRAM
Knowledge of layout, power estimates

Compilers
Experience with compiler design
Experience extending LLVM or GCC
Knowledge of compiler optimization, program transformations
Knowledge of High level optimization and backend optimization/code generation
Domain specific compilation and source‐to‐source translation

HPC/supercomputing/signal processing/graph processing
Experience with performance modeling
Knowledge of numerical analysis and IEEE floating point issues
Having been part of the development team of a large scientific application
Experience running, optimizing, and debugging code on large HPC or supercomputer/TOP500 installations
Knowledge of software infrastructure used in HPC/supercomputing environments
Knowledge of numerical linear algebra, FFT, and sparse linear algebra/solver algorithms and software packages
Knowledge of algorithms used in signal/image/video processing, big data analytics, machine learning