Third year PhD student
Electrical and Computer Engineering
Carnegie Mellon University
CIC 4th Floor
Pittsburgh PA 15213
Email: donghyu1@cmu.edu

I am pursuing my PhD in Electrical & Computer Engineering, working with Prof. Onur Mutlu. I received my bachelors in Electronics & Communication Engineering from Seoul National University, Korea. I am interested in high-performance and energy-efficient memory subsystems and high-performance DNA sequence analysis.

PUBLICATIONS

Tiered-Latency DRAM: A Low Latency and Low Cost DRAM Architecture,
Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, Onur Mutlu,
in proceedings of the 19th International Symposium on High-Performance Computer Architecture (HPCA), 2013. [pdf] [slides]

Accelerating Read Mapping with FastHASH,
Hongyi Xin, Donghyuk Lee, Farhad Hormozdiari, Samihan Yedkar, Onur Mutlu, Can Alkan,
in proceedings of BMC Genomics 14:S13, January 2013. [pdf]

A Case for Subarray-Level Parallelism (SALP) in DRAM,
Yoongu Kim, Vivek Seshadri, Donghyuk Lee, Jamie Liu, Onur Mutlu,
in proceedings of the 39th International Symposium on Computer Architecture (ISCA), 2012. [pdf]

A 1.2V 12.8GB/s 2Gb Mobile Wide-I/O DRAM With 4X128 I/Os Using TSV Based Stacking,
Jung-Sik Kim, Chi Sung Oh, Hocheol Lee, Donghyuk Lee, Hyong Ryol Hwang, Sooman Hwang, Byongwook Na, Joungwook Moon, Jin-Guk Kim, Hanna Park, Jang-Woo Ryu, Kiwon Park, Sang-Kyu Kang, So-Young Kim, Hoyoung Kim, Jong-Min Bang, Hyunyoon Cho, Minsoo Jang, Cheolmin Han, Jung-Bae Lee, Kyehyun Kyung, Joo-Sun Choi, Young-Hyun Jun,
in proceedings of the IEEE Journal of Solid-State Circuits (JSSC), January 2012. [pdf]

A 1.2V 12.8GB/s 2Gb Mobile Wide-I/O DRAM With 4X128 I/Os Using TSV Based Stacking,
Jung-Sik Kim, Chi Sung Oh, Hocheol Lee, Donghyuk Lee, Hyong Ryol Hwang, Sooman Hwang, Byongwook Na, Joungwook Moon, Jin-Guk Kim, Hanna Park, Jang-Woo Ryu, Kiwon Park, Sang-Kyu Kang, So-Young Kim, Hoyoung Kim, Jong-Min Bang, Hyunyoon Cho, Minsoo Jang, Cheolmin Han, Jung-Bae Lee, Kyehyun Kyung, Joo-Sun Choi, Young-Hyun Jun,
in proceedings of the IEEE International Solid-State Circuits Conference (ISSCC), 2011. [pdf]

A 512Mb Two-Channel Mobile DRAM (OneDRAM) With Shared Memory Array,
Jung-Sik Kim, Kyungwoo Nam, Chi Sung Oh, Han Gu Sohn, Donghyuk Lee, Sooyoung Kim, Jong-Wook Park, Yongjun Kim, Mi-Jo Kim, Jin-Guk Kim, Hocheol Lee, Jinhyoung Kwon, Dong Il Seo, Young-Hyun Jun, Kinam Kim,
in proceedings of the IEEE Journal of Solid-State Circuits (JSSC), November 2008. [pdf]

A 512Mb 2-Channel Mobile DRAM (oneDRAMâ„¢) with Shared Memory Array,
Kyungwoo Nam, Jung-Sik Kim, Chi-Sung Oh, Hangu Sohn, Donghyuk Lee, Changho Lee, Sooyoung Kim, Jong-Wook Park, Yongjun Kim, Mijo Kim, Jinkuk Kim, Hocheol Lee, Jinhyoung Kwon, Dong Il Seo, Young-Hyun Jun, Kinam Kim,
in proceedings of the IEEE Asian Solid-State Circuits Conference (ASSCC), November 2007. [pdf]